Symbolic Simulation Methods for Industrial Formal Verification contains two distinct, but related, approaches to the verification problem. Both are based on symbolic simulation. The first approach is applied at the gate level and has been successful in verifying sub-circuits of industrial microprocessors with tens and even hundreds of thousands of gates. The second approach is applied at a high-level of abstraction and is used for high-level descriptions of designs.

Historically, it has been difficult to apply formal verification methods developed in academia to the verification problems encountered in commercial design projects. This book describes new ideas that enable the use of formal methods, specifically symbolic simulation, in validating commercial hardware designs of remarkable complexity. These ideas are demonstrated on circuits with many thousands of latches-much larger circuits than those previously formally verified. The book contains three main topics:

• Self consistency, a technique for deriving a formal specification of design behavior from the design itself;
• The use of the parametric representation to encode predicates as functional vectors for symbolic simulation, an important step in addressing the state-explosion problem;
• Incremental flushing, a method used to verify high-level descriptions of out-of-order execution.

Symbolic Simulation Methods for Industrial Formal Verification concludes with work on verification of simplified models of out-of-order processors.

This book constitutes the refereed proceedings of the 18th International Conference on Computer Aided Verification, CAV 2006, held as part of the 4th Federated Logic Conference, FLoC 2006. Presents 35 revised full papers together with 10 tool papers and 4 invited papers adressing all current issues in computer aided verification and model checking - from foundational and methodological issues ranging to the evaluation of major tools and systems

This volume contains two distinct, but related, approaches to the verification problem, both based on symbolic simulation. It describes new ideas that enable the use of formal methods, specifically symbolic simulation, in validating commercial hardware designs of remarkable complexity.

Includes a Thai-English glossary of over 3,500 words.