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Analog IC Placement Generation via Neural Networks from Unlabeled Data (Paperback, 1st ed. 2020)
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Analog IC Placement Generation via Neural Networks from Unlabeled Data (Paperback, 1st ed. 2020)
Series: SpringerBriefs in Applied Sciences and Technology
Expected to ship within 10 - 15 working days
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In this book, innovative research using artificial neural networks
(ANNs) is conducted to automate the placement task in analog
integrated circuit layout design, by creating a generalized model
that can generate valid layouts at push-button speed. Further, it
exploits ANNs' generalization and push-button speed prediction
(once fully trained) capabilities, and details the optimal
description of the input/output data relation. The description
developed here is chiefly reflected in two of the system's
characteristics: the shape of the input data and the minimized loss
function. In order to address the latter, abstract and segmented
descriptions of both the input data and the objective behavior are
developed, which allow the model to identify, in newer scenarios,
sub-blocks which can be found in the input data. This approach
yields device-level descriptions of the input topology that, for
each device, focus on describing its relation to every other device
in the topology. By means of these descriptions, an unfamiliar
overall topology can be broken down into devices that are subject
to the same constraints as a device in one of the training
topologies. In the experimental results chapter, the trained ANNs
are used to produce a variety of valid placement solutions even
beyond the scope of the training/validation sets, demonstrating the
model's effectiveness in terms of identifying common components
between newer topologies and reutilizing the acquired knowledge.
Lastly, the methodology used can readily adapt to the given
problem's context (high label production cost), resulting in an
efficient, inexpensive and fast model.
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