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Parasitic-Aware Optimization of CMOS RF Circuits (Hardcover, 2003 ed.)
Loot Price: R2,789
Discovery Miles 27 890
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Parasitic-Aware Optimization of CMOS RF Circuits (Hardcover, 2003 ed.)
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In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts
are aimed at the realization of true single-chip radios with few,
if any, off-chip components. Ironically, the on-chip passive
components required for RF integration pose miore serious
challenges to SOC integration than the active CMOS and BJT devices.
This is not surprising since modern digital IC designs are
dominated as much, or more, by interconnectg characteristics than
by active device properties. In any event, the co-integration of
active and passive devices in RFIC design represents a serious
design problem and an even more daunting manufacturing challenge.
If conventional mixed-signal design techniques are employed,
parasitics associated with passive elements (resistors, capacitors,
inductors, transformers, pads, etc.) and the package effectively
de-tune RF circuits rendering them sub-optimal or virtually
useless. Hence, dealing with parasitics in an effective way as part
of the design process is an essential emerging methodology in
modern SOC design. The parasitic-aware RF circuit synthesis
techinques described in this book effectively address this critical
problem.
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