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Pipelined Multiprocessor System-on-Chip for Multimedia (Paperback, Softcover reprint of the original 1st ed. 2014)
Loot Price: R3,253
Discovery Miles 32 530
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Pipelined Multiprocessor System-on-Chip for Multimedia (Paperback, Softcover reprint of the original 1st ed. 2014)
Expected to ship within 10 - 15 working days
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This book describes analytical models and estimation methods to
enhance performance estimation of pipelined multiprocessor
systems-on-chip (MPSoCs). A framework is introduced for both
design-time and run-time optimizations. For design space
exploration, several algorithms are presented to minimize the area
footprint of a pipelined MPSoC under a latency or a throughput
constraint. A novel adaptive pipelined MPSoC architecture is
described, where idle processors are transitioned into low-power
states at run-time to reduce energy consumption. Multi-mode
pipelined MPSoCs are introduced, where multiple pipelined MPSoCs
optimized separately are merged into a single pipelined MPSoC,
enabling further reduction of the area footprint by sharing the
processors and communication buffers. Readers will benefit from the
authors’ combined use of analytical models, estimation methods
and exploration algorithms and will be enabled to explore billions
of design points in a few minutes.
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