Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies (Hardcover, 2007 ed.)

In the deep sub-micron regime, the power consumption has become one of the most important issues for competitive design of digital circuits. Due to dramatically increasing leakage currents, the power consumption does not take advantage of technology scaling as before. State-of-art power reduction techniques like the use of multiple supply and threshold voltages, transistor stack forcing and power gating are discussed with respect to implementation and power saving capability. Focus is given especially on technology dependencies, process variations and technology scaling. Design and implementation issues are discussed with respect to the trade-off between power reduction, performance degradation, and system level constraints. A complete top-down design flow is demonstrated for power gating techniques introducing new design methodologies for the switch sizing task and circuit blocks for data-retention and block activation.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Series:	Springer Series in Advanced Microelectronics, 25
Release date:	October 2006
First published:	2007
Authors:	Stephan Henzler
Dimensions:	235 x 155 x 12mm (L x W x T)
Format:	Hardcover
Pages:	186
Edition:	2007 ed.
ISBN-13:	978-1-4020-5080-0
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
LSN:	1-4020-5080-1
Barcode:	9781402050800

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