Long design cycles due to the inability to predict silicon
realities is a well-known problem that plagues analog/RF integrated
circuit product development. As this problem worsens for nanoscale
IC technologies, the high cost of design and multiple manufacturing
spins causes fewer products to have the volume required to support
full custom implementation. We propose a regular analog/RF IC using
metal-mask configurability design methodology ORACLE, which is a
combination of reuse and shared-use by formulating the synthesis
problem as an optimization with recourse problem. Using a two-stage
geometric programming with recourse approach, ORACLE solves for
both the globally optimal shared and application-specific
variables. Furthermore, robust optimization is proposed to treat
the design with variability issue, further enhancing the ORACLE
methodology by providing yield bound for each configuration of
regular designs.
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