Verilog(R) Quickstart is a basic, practical, introductory textbook for professionals and students alike. This book explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as 'intellectual property' or 'macro-cells'. Verilog(R) Quickstart presents some of the formal Verilog syntax and definitions and then shows practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. Verilog(R) Quickstart has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modeling style and explaining why and when one would use different elements of the language. Another feature of the book is the chapter on state machine modeling.There is also a chapter on test benches and testing strategy as well as a chapter on debugging. Verilog(R) Quickstart is designed to teach the Verilog language, to show the designer how to model in Verilog and to explain the basics of using Verilog simulators.

From a review of the Second Edition 'If you are new to the field and want to know what "all this Verilog stuff is about," you've found the golden goose. The text here is straight forward, complete, and example rich -mega-multi-kudos to the author James Lee. Though not as detailed as the Verilog reference guides from Cadence, it likewise doesn't suffer from the excessive abstractness those make you wade through. This is a quick and easy read, and will serve as a desktop reference for as long as Verilog lives. Best testimonial: I'm buying my fourth and fifth copies tonight (I've loaned out/lost two of my others).' Zach Coombes, AMD

From a review of the Second Edition
'If you are new to the field and want to know what "all this Verilog stuff is about," you've found the golden goose. The text here is straight forward, complete, and example rich -mega-multi-kudos to the author James Lee. Though not as detailed as the Verilog reference guides from Cadence, it likewise doesn't suffer from the excessive abstractness those make you wade through. This is a quick and easy read, and will serve as a desktop reference for as long as Verilog lives. Best testimonial: I'm buying my fourth and fifth copies tonight (I've loaned out/lost two of my others).'
Zach Coombes, AMD

VerilogA(R) Quickstart is a basic, practical, introductory textbook for professionals and students alike. This book explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as intellectual property' or macro-cells'. VerilogA(R) Quickstart presents some of the formal Verilog syntax and definitions and then shows practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. VerilogA(R) Quickstart has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modeling style and explaining why and when one would use different elements of the language. Another feature of the book is the chapter on state machine modeling. There is also a chapter on test benches and testing strategy as well as a chapter on debugging. VerilogA(R) Quickstart is designed to teach the Verilog language, to show the designer how to model in Verilog and to explain the basics of using Verilog simulators.