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This research monograph focuses on the design of arithmetic circuits in Quantum Dot Cellular Automata (QCA). Using the fact that the 3-input majority gate is a primitive in QCA, the book sets out to discover hitherto unknown properties of majority logic in the context of arithmetic circuit designs. The pursuit for efficient adders in QCA takes two forms. One involves application of the new results in majority logic to existing adders. The second involves development of a custom adder for QCA technology. A QCA adder named as hybrid adder is proposed and it is shown that it outperforms existing multi-bit adders with respect to area and delay. The work is extended to the design of a low-complexity multiplier for signed numbers in QCA. Furthermore the book explores two aspects unique to QCA technology, namely thermal robustness and the role of interconnects. In addition, the book introduces the reader to QCA layout design and simulation using QCADesigner. Features & Benefits: This research-based book: *Introduces the reader to Quantum Dot Cellular Automata, an emerging nanotechnology. *Explores properties of majority logic. *Demonstrates application of the properties to design efficient arithmetic circuits. *Guides the reader towards layout design and simulation in QCADesigner.
This book introduces readers to the emerging carbon nanotube field-effect transistor (CNTFET) technology, and examines the problem of designing efficient arithmetic circuits in CNTFET technology. Observing that CNTFETs make it possible to achieve two distinct threshold voltages merely by altering the diameter of the carbon nanotube used, the book begins by discussing the design of basic ternary logic elements. It then examines efficient CNTFET-based design of single and multiple ternary digit adders by judicious choice of unary operators in ternary logic, as well as the design of a ternary multiplier in CNTFET technology, and presents detailed simulation results in HSPICE. Lastly, the book outlines a procedure for automating the synthesis process and provides sample code in Python.
This research monograph focuses on the design of arithmetic circuits in Quantum Dot Cellular Automata (QCA). Using the fact that the 3-input majority gate is a primitive in QCA, the book sets out to discover hitherto unknown properties of majority logic in the context of arithmetic circuit designs. The pursuit for efficient adders in QCA takes two forms. One involves application of the new results in majority logic to existing adders. The second involves development of a custom adder for QCA technology. A QCA adder named as hybrid adder is proposed and it is shown that it outperforms existing multi-bit adders with respect to area and delay. The work is extended to the design of a low-complexity multiplier for signed numbers in QCA. Furthermore the book explores two aspects unique to QCA technology, namely thermal robustness and the role of interconnects. In addition, the book introduces the reader to QCA layout design and simulation using QCADesigner. Features & Benefits: This research-based book: ·Introduces the reader to Quantum Dot Cellular Automata, an emerging nanotechnology. ·Explores properties of majority logic. ·Demonstrates application of the properties to design efficient arithmetic circuits. ·Guides the reader towards layout design and simulation in QCADesigner.
This book introduces readers to the emerging carbon nanotube field-effect transistor (CNTFET) technology, and examines the problem of designing efficient arithmetic circuits in CNTFET technology. Observing that CNTFETs make it possible to achieve two distinct threshold voltages merely by altering the diameter of the carbon nanotube used, the book begins by discussing the design of basic ternary logic elements. It then examines efficient CNTFET-based design of single and multiple ternary digit adders by judicious choice of unary operators in ternary logic, as well as the design of a ternary multiplier in CNTFET technology, and presents detailed simulation results in HSPICE. Lastly, the book outlines a procedure for automating the synthesis process and provides sample code in Python.
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