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Books > Computing & IT > Computer hardware & operating systems > Supercomputers

Integration of Services into Workflow Applications (Paperback): Pawel Czarnul Integration of Services into Workflow Applications (Paperback)
Pawel Czarnul
R1,983 Discovery Miles 19 830 Ships in 10 - 15 working days

Describing state-of-the-art solutions in distributed system architectures, Integration of Services into Workflow Applications presents a concise approach to the integration of loosely coupled services into workflow applications. It discusses key challenges related to the integration of distributed systems and proposes solutions, both in terms of theoretical aspects such as models and workflow scheduling algorithms, and technical solutions such as software tools and APIs. The book provides an in-depth look at workflow scheduling and proposes a way to integrate several different types of services into one single workflow application. It shows how these components can be expressed as services that can subsequently be integrated into workflow applications. The workflow applications are often described as acyclic graphs with dependencies which allow readers to define complex scenarios in terms of basic tasks. Presents state-of-the-art solutions to challenges in multi-domain workflow application definition, optimization, and execution Proposes a uniform concept of a service that can represent executable components in all major distributed software architectures used today Discusses an extended model with determination of data flows among parallel paths of a workflow application Since workflow applications often process big data, the book explores the dynamic management of data with various storage constraints during workflow execution. It addresses several practical problems related to data handling, including data partitioning for parallel processing next to service selection and scheduling, processing data in batches or streams, and constraints on data sizes that can be processed at the same time by service instances. Illustrating several workflow applications that were proposed, implemented, and benchmarked in a real BeesyCluster environment, the book includes templates for

Introduction to Scientific and Technical Computing (Hardcover): Frank T. Willmore, Eric Jankowski, Coray Colina Introduction to Scientific and Technical Computing (Hardcover)
Frank T. Willmore, Eric Jankowski, Coray Colina
R5,354 Discovery Miles 53 540 Ships in 10 - 15 working days

Created to help scientists and engineers write computer code, this practical book addresses the important tools and techniques that are necessary for scientific computing, but which are not yet commonplace in science and engineering curricula. This book contains chapters summarizing the most important topics that computational researchers need to know about. It leverages the viewpoints of passionate experts involved with scientific computing courses around the globe and aims to be a starting point for new computational scientists and a reference for the experienced. Each contributed chapter focuses on a specific tool or skill, providing the content needed to provide a working knowledge of the topic in about one day. While many individual books on specific computing topics exist, none is explicitly focused on getting technical professionals and students up and running immediately across a variety of computational areas.

Introduction to High Performance Computing for Scientists and Engineers (Hardcover): Georg Hager, Gerhard Wellein Introduction to High Performance Computing for Scientists and Engineers (Hardcover)
Georg Hager, Gerhard Wellein
R5,362 Discovery Miles 53 620 Ships in 10 - 15 working days

Written by high performance computing (HPC) experts, Introduction to High Performance Computing for Scientists and Engineers provides a solid introduction to current mainstream computer architecture, dominant parallel programming models, and useful optimization strategies for scientific HPC. From working in a scientific computing center, the authors gained a unique perspective on the requirements and attitudes of users as well as manufacturers of parallel computers. The text first introduces the architecture of modern cache-based microprocessors and discusses their inherent performance limitations, before describing general optimization strategies for serial code on cache-based architectures. It next covers shared- and distributed-memory parallel computer architectures and the most relevant network topologies. After discussing parallel computing on a theoretical level, the authors show how to avoid or ameliorate typical performance problems connected with OpenMP. They then present cache-coherent non-uniform memory access (ccNUMA) optimization techniques, examine distributed-memory parallel programming with message passing interface (MPI), and explain how to write efficient MPI code. The final chapter focuses on hybrid programming with MPI and OpenMP. Users of high performance computers often have no idea what factors limit time to solution and whether it makes sense to think about optimization at all. This book facilitates an intuitive understanding of performance limitations without relying on heavy computer science knowledge. It also prepares readers for studying more advanced literature. Read about the authors' recent honor: Informatics Europe Curriculum Best Practices Award for Parallelism and Concurrency.

Elements of Parallel Computing (Hardcover): Eric Aubanel Elements of Parallel Computing (Hardcover)
Eric Aubanel
R5,769 Discovery Miles 57 690 Ships in 10 - 15 working days

Created to help scientists and engineers write computer code, this practical book addresses the important tools and techniques that are necessary for scientific computing, but which are not yet commonplace in science and engineering curricula. This book contains chapters summarizing the most important topics that computational researchers need to know about. It leverages the viewpoints of passionate experts involved with scientific computing courses around the globe and aims to be a starting point for new computational scientists and a reference for the experienced. Each contributed chapter focuses on a specific tool or skill, providing the content needed to provide a working knowledge of the topic in about one day. While many individual books on specific computing topics exist, none is explicitly focused on getting technical professionals and students up and running immediately across a variety of computational areas.

System Error - Where Big Tech Went Wrong and How We Can Reboot (Paperback): Jeremy Weinstein, Rob Reich, Mehran Sahami System Error - Where Big Tech Went Wrong and How We Can Reboot (Paperback)
Jeremy Weinstein, Rob Reich, Mehran Sahami
R438 R400 Discovery Miles 4 000 Save R38 (9%) Ships in 9 - 17 working days

Read this if you want to understand how to shape our technological future and reinvigorate democracy along the way. -- Reed Hastings, co-founder and CEO of Netflix __________ A forward-thinking manifesto from three Stanford professors which reveals how big tech's obsession with optimization and efficiency has sacrificed fundamental human values and outlines steps we can take to change course, renew our democracy, and save ourselves. __________ In no more than the blink of an eye, a naive optimism about technology's liberating potential has given way to a dystopian obsession with biased algorithms, surveillance capitalism, and job-displacing robots. Yet too few of us see any alternative to accepting the onward march of technology. We have simply accepted a technological future designed for us by technologists, the venture capitalists who fund them, and the politicians who give them free rein. It doesn't need to be this way. System Error exposes the root of our current predicament: how big tech's relentless focus on optimization is driving a future that reinforces discrimination, erodes privacy, displaces workers, and pollutes the information we get. Armed with an understanding of how technologists think and exercise their power, three Stanford professors - a philosopher working at the intersection of tech and ethics, a political scientist who served under Obama, and the director of the undergraduate Computer Science program at Stanford (also an early Google engineer) - reveal how we can hold that power to account. As the dominance of big tech becomes an explosive societal conundrum, they share their provocative insights and concrete solutions to help everyone understand what is happening, what is at stake, and what we can do to control technology instead of letting it control us.

High Performance Computing in Science and Engineering - Transactions of the High Performance Computing Center Stuttgart (Hlrs)... High Performance Computing in Science and Engineering - Transactions of the High Performance Computing Center Stuttgart (Hlrs) 1998 (Hardcover, illustrated edition)
Egon Krause, Willi Jager
R2,476 Discovery Miles 24 760 Ships in 10 - 15 working days

The book contains reports about the most significant projects from science and industry that are using the supercomputers of the Federal High Performance Computing Center Stuttgart (HLRS). These projects are from different scientific disciplines, with a focus on engineering, physics and chemistry. They were carefully selected in a peer-review process and are showcases for an innovative combination of state-of-the-art physical modeling, novel algorithms and the use of leading-edge parallel computer technology. As HLRS is in close cooperation with industrial companies, special emphasis has been put on the industrial relevance of results and methods.

High Performance Computing - Programming and Applications (Hardcover): John Levesque, Gene Wagenbreth High Performance Computing - Programming and Applications (Hardcover)
John Levesque, Gene Wagenbreth
R3,089 Discovery Miles 30 890 Ships in 10 - 15 working days

High Performance Computing: Programming and Applications presents techniques that address new performance issues in the programming of high performance computing (HPC) applications. Omitting tedious details, the book discusses hardware architecture concepts and programming techniques that are the most pertinent to application developers for achieving high performance. Even though the text concentrates on C and Fortran, the techniques described can be applied to other languages, such as C++ and Java. Drawing on their experience with chips from AMD and systems, interconnects, and software from Cray Inc., the authors explore the problems that create bottlenecks in attaining good performance. They cover techniques that pertain to each of the three levels of parallelism: 1. Message passing between the nodes 2. Shared memory parallelism on the nodes or the multiple instruction, multiple data (MIMD) units on the accelerator 3. Vectorization on the inner level After discussing architectural and software challenges, the book outlines a strategy for porting and optimizing an existing application to a large massively parallel processor (MPP) system. With a look toward the future, it also introduces the use of general purpose graphics processing units (GPGPUs) for carrying out HPC computations. A companion website at www.hybridmulticoreoptimization.com contains all the examples from the book, along with updated timing results on the latest released processors.

Petascale Computing - Algorithms and Applications (Hardcover): David A. Bader Petascale Computing - Algorithms and Applications (Hardcover)
David A. Bader
R3,986 Discovery Miles 39 860 Ships in 10 - 15 working days

Although the highly anticipated petascale computers of the near future will perform at an order of magnitude faster than today's quickest supercomputer, the scaling up of algorithms and applications for this class of computers remains a tough challenge. From scalable algorithm design for massive concurrency toperformance analyses and scientific visualization, Petascale Computing: Algorithms and Applications captures the state of the art in high-performance computing algorithms and applications. Featuring contributions from the world's leading experts in computational science, this edited collection explores the use of petascale computers for solving the most difficult scientific and engineering problems of the current century.

Covering a wide range of important topics, the book illustrates how petascale computing can be applied to space and Earth science missions, biological systems, weather prediction, climate science, disasters, black holes, and gamma ray bursts. It details the simulation of multiphysics, cosmological evolution, molecular dynamics, and biomolecules. The book also discusses computational aspects that include the Uintah framework, Enzo code, multithreaded algorithms, petaflops, performance analysis tools, multilevel finite element solvers, finite element code development, Charm++, and the Cactus framework.

Supplying petascale tools, programming methodologies, and an eight-page color insert, this volume addresses the challenging problems of developing application codes that can take advantage of the architectural features of the new petascale systems in advance of their first deployment.

A Comprehensive Study of SQL - Practice and Implementation (Hardcover): Jagdish Chandra Patni A Comprehensive Study of SQL - Practice and Implementation (Hardcover)
Jagdish Chandra Patni
R2,297 Discovery Miles 22 970 Ships in 10 - 15 working days

A Comprehensive Study of SQL - Practice and Implementation is designed as a textbook and provides a comprehensive approach to SQL (Structured Query Language), the standard programming language for defining, organizing, and exploring data in relational databases. It demonstrates how to leverage the two most vital tools for data query and analysis - SQL and Excel - to perform comprehensive data analysis without the need for a sophisticated and expensive data mining tool or application. Features The book provides a complete collection of modeling techniques, beginning with fundamentals and gradually progressing through increasingly complex real-world case studies It explains how to build, populate, and administer high-performance databases and develop robust SQL-based applications It also gives a solid foundation in best practices and relational theory The book offers self-contained lessons on key SQL concepts or techniques at the end of each chapter using numerous illustrations and annotated examples This book is aimed primarily at advanced undergraduates and graduates with a background in computer science and information technology. Researchers and professionals will also find this book useful.

Operating Systems for Supercomputers and High Performance Computing (Hardcover, 1st ed. 2019): Balazs Gerofi, Yutaka Ishikawa,... Operating Systems for Supercomputers and High Performance Computing (Hardcover, 1st ed. 2019)
Balazs Gerofi, Yutaka Ishikawa, Rolf Riesen, Robert W. Wisniewski
R3,397 Discovery Miles 33 970 Ships in 18 - 22 working days

Few works are as timely and critical to the advancement of high performance computing than is this new up-to-date treatise on leading-edge directions of operating systems. It is a first-hand product of many of the leaders in this rapidly evolving field and possibly the most comprehensive. This new and important book masterfully presents the major alternative concepts driving the future of operating system design for high performance computing. In particular, it describes the major advances of monolithic operating systems such as Linux and Unix that dominate the TOP500 list. It also presents the state of the art in lightweight kernels that exhibit high efficiency and scalability at the loss of generality. Finally, this work looks forward to possibly the most promising strategy of a hybrid structure combining full service functionality with lightweight kernel operation. With this, it is likely that this new work will find its way on the shelves of almost everyone who is in any way engaged in the multi-discipline of high performance computing. (From the foreword by Thomas Sterling)

High Performance Computing in Science and Engineering 2000 - Transactions of the High Performance Computing Center, Stuttgart... High Performance Computing in Science and Engineering 2000 - Transactions of the High Performance Computing Center, Stuttgart (HLRS) 2000 (Hardcover, 2000 ed.)
Egon Krause, Willi Jager
R2,970 Discovery Miles 29 700 Ships in 18 - 22 working days

The book summarizes the results of the projects of the High Performance Computing Center Stuttgart (HLRS) for the year 2000. The most significant contributions have been selected in a scientific review process. Together they provide an overview of recent developments in high performance computing and simulation. Reflecting the close cooperation of the HLRS with industry, special emphasis has been put on the industrial relevance of the presented results and methods. The book therefore becomes a collection of showcases for an innovative combination of the state-of-the-art modeling, novel numerical algorithms and the use of leading edge high performance computing systems.

High Performance Embedded Computing Handbook - A Systems Perspective (Hardcover, 3rd Edition): David R Martinez High Performance Embedded Computing Handbook - A Systems Perspective (Hardcover, 3rd Edition)
David R Martinez; Edited by David R Martinez; Robert A. Bond, M. Michael Vai; Edited by Robert A. Bond; Contributions by …
R1,306 Discovery Miles 13 060 Ships in 2 - 4 working days

Over the past several decades, applications permeated by advances in digital signal processing have undergone unprecedented growth in capabilities. The editors and authors of High Performance Embedded Computing Handbook: A Systems Perspective have been significant contributors to this field, and the principles and techniques presented in the handbook are reinforced by examples drawn from their work.

The chapters cover system components found in today’s HPEC systems by addressing design trade-offs, implementation options, and techniques of the trade, then solidifying the concepts with specific HPEC system examples. This approach provides a more valuable learning tool, Because readers learn about these subject areas through factual implementation cases drawn from the contributing authors’ own experiences.

Discussions include:

Key subsystems and components

Computational characteristics of high performance embedded algorithms and applications

Front-end real-time processor technologies such as analog-to-digital conversion, application-specific integrated circuits, field programmable gate arrays, and intellectual property–based design

Programmable HPEC systems technology, including interconnection fabrics, parallel and distributed processing, performance metrics and software architecture, and automatic code parallelization and optimization

Examples of complex HPEC systems representative of actual prototype developments

Application examples, including radar, communications, electro-optical, and sonar applications

The handbook is organized around a canonical framework that helps readers navigate through the chapters, and it concludes with a discussion of future trends in HPEC systems. The material is covered at a level suitable for practicing engineers and HPEC computational practitioners and is easily adaptable to their own implementation requirements.

Table of Contents

INTRODUCTION

A Retrospective on High Performance Embedded Computing

D.R. Martinez

HPEC Hardware Systems and Software Technologies

HPEC Multiprocessor System

Representative Example of a High Performance Embedded Computing System

D.R. Martinez

System Complexity

Implementation Techniques

Software Complexity and System Integration

System Architecture of a Multiprocessor System

D.R. Martinez

A Generic Multiprocessor System

A High Performance Hardware System

Custom VLSI Implementation: Custom VLSI Hardware

A High Performance COTS Programmable Signal Processor

High Performance Embedded Computers: Development Process and

Management Perspectives

D.R. Martinez

Development Process

Case Study: Airborne Radar HPEC System: Programmable Signal Processor Development; Software Estimation, Monitoring, and Configuration Control; PSP Software Integration, Optimization, and Verification

Trends

Computational Nature of High Performance

Embedded Systems

Computational Characteristics of High Performance Embedded Algorithms and Applications

M. Arakawa and R.A. Bond

General Computational Characteristics of HPEC

Complexity of HPEC Algorithms

Parallelism in HPEC Algorithms and Architectures

Future Trends

Radar Signal Processing: An Example of High Performance Embedded Computing

R.A. Bond and A.I. Reuther

A Canonical HPEC Radar Algorithm: Subband Analysis and Synthesis; Adaptive Beamforming; Pulse Compression; Doppler Filtering; Space-Time Adaptive Processing; Subband Synthesis Revisited; CFAR Detection

Example Architecture of the Front-End Processor: A Discussion of the Back-End Processing

Front-End Real-Time Processor Technologies

Analog-to-Digital Conversion

J.C. Anderson and H.H. Kim

Conceptual ADC Operation

Static Metrics:Offset Error; Gain Error; Differential Nonlinearity; Integral Nonlinearity

Dynamic Metrics: Resolution; Monotonicity; Equivalent Input-Referred Noise (Thermal Noise); Quantization Error; Ratio of Signal to Noise and Distortion; Effective Number of Bits; Spurious-Free Dynamic Range; Dither; Aperture Uncertainty

System-Level Performance Trends and Limitations: Trends in Resolution; Trends in Effective Number of Bits; Trends in Spurious-Free Dynamic Range; Trends in Power Consumption; ADC Impact on Processing Gain

High-Speed ADC Design: Flash ADC; Architectural Techniques for Power Saving; Pipeline ADC

Power Dissipation Issues in High-Speed ADCs

Implementation Approaches of Front-End Processors

M.M. Vai and H.T. Nguyen

Front-End Processor Design Methodology

Front-End Signal Processing Technologies: Full-Custom ASIC; Synthesized ASIC; FPGA Technology;

Structured ASIC

Intellectual Property

Development Cost

Design Space

Design Case Studies: Channelized Adaptive Beamformer Processor; Radar Pulse Compression Processor;

Co-design Benefits

Application-Specific Integrated Circuits

M.M. Vai, W.S. Song, and B.M. Tyrell

Integrated Circuit Technology Evolution

CMOS Technology: MOSFET

CMOS Logic Structures: Static Logic; Dynamic CMOS Logic

Integrated Circuit Fabrication

Performance Metrics: Speed; Power Dissipation

Design Methodology: Full-Custom Physical Design; Synthesis Process; Physical Verification;

Simulation; Design for Manufacturability

Packages

Testing: Fault Models; Test Generation for Stuck-at Faults; Design for Testability; Built-in Self-Test

Case Study

Field Programmable Gate Arrays

M.Leeser

FPGA Structures: Basic Structures Found in FPGAs

Modern FPGA Architectures: Embedded Blocks; Future Directions

Commercial FPGA Boards and Systems

Languages and Tools for Programming FPGAs: Hardware Description Languages; High-Level Languages; Library-Based Solutions

Case Study: Radar Processing on an FPGA: Project Description; Parallelism: Fine-Grained versus Coarse-Grained; Data Organization; Experimental Results

Challenges to High Performance With FPGA Architectures: Data: Movement and Organization; Design Trade-offs

Intellectual Property-Based Design

W. Wolf

Classes of Intellectual Property

Sources of Intellectual Property

Licenses for Intellectual Property

CPU Cores

Busses

I/O Devices

Memories

Operating Systems

Software Libraries and Middleware

IP-Based Design Methodologies

Standards-Based Design

Systolic Array Processors

M.M. Vai, H.T. Nguyen, P.A. Jackson, and W.S. Song

Beamforming Processor Design

Systolic Array Design Approach

Design Examples: QR Decomposition Processor; Real-Time FFT Processor; Bit-Level Systolic Array Methodology

Programmable High Performance Embedded

Computing Systems

Computing Devices

K. Teitelbaum

Common Metrics: Assessing the Required Computation Rate; Quantifying the Performance of COTS Computing Devices

Current COTS Computing Devices in Embedded Systems: General-Purpose Microprocessors:

Word Length, Vector Processing Units, Power Consumption versus Performance, Memory Hierarchy, Some Benchmark Results, Input/Output, Digital Signal Processors; Future Trends: Technology Projections and Extrapolating Current Architectures; Advanced Architectures and the Exploitation of Moore’s Law: Multiple-Core Processors, The IBM Cell Broadband Engine, SIMD Processor Arrays, DARPA Polymorphic Computing Architectures, Graphical Processing Units as Numerical Co-processors, FPGA-Based Co-processors

Interconnection Fabrics

K. Teitelbaum

Introduction: Anatomy of a Typical Interconnection Fabric; Network Topology and Bisection Bandwidth;

Total Exchange; Parallel Two-Dimensional Fast Fourier Transform—A Simple Example

Crossbar Tree Networks: Network Formulas; Scalability of Network Bisection Width; Units of Replication;

Pruning Crossbar Tree Networks

VXS: A Commercial Example: Link Essentials; VXS-Supported Topologies

Performance Metrics and Software Architecture

J. Kepner, T. Meuse, and G.E. Schrader

Synthetic Aperture Radar Example Application: Operating Modes; Computational Workload

Degrees of Parallelism: Parallel Performance Metrics (no communication); Parallel Performance Metrics (with communication); Amdahl’s Law

Standard Programmable Multi-Computer: Network Model

Parallel Programming Models and Their Impact: High-Level Programming Environment with Global Arrays

System Metrics: Performance; Form Factor; Efficiency; Software Cost

Appendices: A Synthetic Aperture Radar Algorithm: Scalable Data Generator; Stage 1: Front-End Sensor Processing; Stage 2: Back-End Knowledge Formation

Programming Languages

J.M. Lebak

Principles of Programming Embedded Signal Processing Systems

Evolution of Programming Languages

Features of Third-Generation Programming Languages: Object-Oriented Programming; Exception Handling; Generic Programming

Use of Specific Languages in High Performance Embedded Computing:

C; Fortran; Ada; C++; Java

Future Development of Programming Languages

Summary: Features of Current Programming Languages

Portable Software Technology

J.M. Lebak

Libraries: Distributed and Parallel Programming; Surveying the State of Portable Software Technology:

Portable Math Libraries, Portable Performance Using Math Libraries; Parallel and Distributed Libraries; Example: Expression Template Use in the MIT Lincoln Laboratory Parallel

Vector Library

Parallel and Distributed Processing

A. I. Reuther and H. G. Kim

Parallel Programming Models: Threads: Pthreads, OpenMP; Message Passing: Parallel Virtual Machine, Message Passing Interface; Partitioned Global Address Space: Unified Parallel C, VSIPL++; Applications: Fast Fourier Transform, Synthetic Aperture Radar

Distributed Computing Models: Client-Server: SOAP, Java Remote Method Invocation, Common Object Request Broker Architecture; Data Driven: Java Messaging Service, Data Distribution Service; Applications: Radar Open Systems Architecture, Integrated Sensing and Decision Support

Automatic Code Parallelization and Optimization

N.T. Bliss

Instruction-Level Parallelism versus Explicit-Program Parallelism

Automatic Parallelization Approaches: A Taxonomy

Maps and Map Independence

Local Optimization in an Automatically Tuned Library

Compiler and Language Approach

Dynamic Code Analysis in a Middleware System

High Performance Embedded Computing

Application Examples

Radar Applications

K. Teitelbaum

Basic Radar Concepts:Pulse-Doppler Radar Operation; Multichannel Pulse-Doppler; Adaptive Beamforming; Space-Time Adaptive Processing

Mapping Radar Algorithms onto HPEC Architectures: Round-Robin Partitioning; Functional Pipelining; Coarse-Grain Data-Parallel Partitioning; Fine-Grain Data-Parallel Partitioning

Implementation Examples: Radar Surveillance Processor; Adaptive Processor (Generation 1); Adaptive Processor (Generation 2); KASSPER

A Sonar Application

W.R. Bernecky

Sonar Problem Description

Designing an Embedded Sonar System: The Sonar Processing Thread; Prototype Development; Computational Requirements; Parallelism; Implementing the Real-Time System; Verify Real-Time Performance; Verify Correct Output

An Example Development: System Attributes; Sonar Processing Thread Computational Requirements; Sensor Data Collection; Two-Dimensional Fast Fourier Transform; Covariance Matrix Formation;

Covariance Matrix Inversion; Adaptive Beamforming; Broadband Formation; Normalization; Detection; Display Preparation and Operator Controls; Summary of Computational Requirements; Parallelism

Hardware Architecture

Software Considerations

Embedded Sonar Systems of the Future References

Communications Applications

J.I. Goodman and T.G. Macdonald

Communications Application Challenges

Communications Signal Processing, Transmitter Signal Processing; Transmitter Processing Requirements; Receiver Signal Processing; Receiver Processing Requirements

Development of a Real-Time Electro-Optical Reconnaissance System

R.A. Coury

Aerial Surveillance Background

Methodology: Performance Modeling; Feature Tracking and Optic Flow; Three-Dimensional Site Model Generation; Challenges; Camera Model; Distortion

System Design Considerations: Altitude; Sensor; GPS/IMU; Processing and Storage; Communications; Cost; Test Platform

Transition to Target Platform: Payload; GPS/IMU; Sensor; Processing; Communications and Storage; Altitude

Future Trends

Application and HPEC System Trends

D.R. Martinez

Introduction: Sensor Node Architecture Trends

Hardware Trends

Software Trends

Distributed Net-Centric Architecture

A Review on Probabilistic CMOS (PCMOS) Technology: From Device

Characteristics to Ultra-Low-Energy SOC Architectures

K.V. Palem, L.N. Chakrapani, B.E.S. Akgul, and P. Korkmaz

Characterizing the Behavior of a PCMOS Switch: Inverter Realization of a Probabilistic Switch;

Analytical Model and the Three Laws of a PCMOS Inverter; Realizing a Probabilistic Inverter with Limited Available Noise

Realizing PCMOS-Based Low-Energy Architectures: Metrics for Evaluating PCMOS-Based Architectures; Experimental Methodology; Metrics for Analysis of PCMOS-Based Implementations; Hyperencryption Application and PCMOS-Based Implementation; Results and Analysis; PCMOS-Based Architectures for Error-Tolerant Applications

Advanced Microprocessor Architectures

J. McMahon, S. Crago, and D. Yeung

Background: Established Instruction-Level Parallelism Techniques; Parallel Architectures

Motivation for New Architectures: Limitations of Conventional Microprocessors

Current Research Microprocessors: Instruction-Level Parallelism: Tile-Based Organization; Explicit Parallelism Model; Scalable On-Chip Networks; Data-Level Parallelism: SIMD Architectures; Vector Architectures; Streaming Architectures; Thread-Level Parallelism: Multithreading and Granularity;

Multilevel Memory; Speculative Execution

Real-Time Embedded Applications: Scalability; Input/Output Bandwidth; Programming Models and Algorithm Mapping

Glossary of Acronyms and Abbreviations

Index

System Error - Where Big Tech Went Wrong and How We Can Reboot (Paperback): Jeremy Weinstein, Rob Reich, Mehran Sahami System Error - Where Big Tech Went Wrong and How We Can Reboot (Paperback)
Jeremy Weinstein, Rob Reich, Mehran Sahami
R281 Discovery Miles 2 810 Ships in 10 - 15 working days

Read this if you want to understand how to shape our technological future and reinvigorate democracy along the way. -- Reed Hastings, co-founder and CEO of Netflix __________ A forward-thinking manifesto from three Stanford professors which reveals how big tech's obsession with optimization and efficiency has sacrificed fundamental human values and outlines steps we can take to change course, renew our democracy, and save ourselves. __________ In no more than the blink of an eye, a naive optimism about technology's liberating potential has given way to a dystopian obsession with biased algorithms, surveillance capitalism, and job-displacing robots. Yet too few of us see any alternative to accepting the onward march of technology. We have simply accepted a technological future designed for us by technologists, the venture capitalists who fund them, and the politicians who give them free rein. It doesn't need to be this way. System Error exposes the root of our current predicament: how big tech's relentless focus on optimization is driving a future that reinforces discrimination, erodes privacy, displaces workers, and pollutes the information we get. Armed with an understanding of how technologists think and exercise their power, three Stanford professors - a philosopher working at the intersection of tech and ethics, a political scientist who served under Obama, and the director of the undergraduate Computer Science program at Stanford (also an early Google engineer) - reveal how we can hold that power to account. As the dominance of big tech becomes an explosive societal conundrum, they share their provocative insights and concrete solutions to help everyone understand what is happening, what is at stake, and what we can do to control technology instead of letting it control us.

High Performance Computing in Science and Engineering - Third International Conference, HPCSE 2017, Karolinka, Czech Republic,... High Performance Computing in Science and Engineering - Third International Conference, HPCSE 2017, Karolinka, Czech Republic, May 22-25, 2017, Revised Selected Papers (Paperback, 1st ed. 2018)
Tomas Kozubek, Martin Cermak, Petr Tichy, Radim Blaheta, Jakub Sistek, …
R1,408 Discovery Miles 14 080 Ships in 18 - 22 working days

This book constitutes the thoroughly refereed post-conference proceedings of the Third International Conference on High Performance Computing in Science and Engineering, HPCSE 2017, held in Karolinka, Czech Republic, in May 2017. The 15 papers presented in this volume were carefully reviewed and selected from 20 submissions. The conference provides an international forum for exchanging ideas among researchers involved in scientific and parallel computing, including theory and applications, as well as applied and computational mathematics. The focus of HPCSE 2017 was on models, algorithms, and software tools which facilitate efficient and convenient utilization of modern parallel and distributed computing architectures, as well as on large-scale applications.

Supercomputing - Third Russian Supercomputing Days, RuSCDays 2017, Moscow, Russia, September 25-26, 2017, Revised Selected... Supercomputing - Third Russian Supercomputing Days, RuSCDays 2017, Moscow, Russia, September 25-26, 2017, Revised Selected Papers (Paperback, 1st ed. 2017)
Vladimir Voevodin, Sergey Sobolev
R1,476 Discovery Miles 14 760 Ships in 18 - 22 working days

This book constitutes the refereed proceedings of the Third Russian Supercomputing Days, RuSCDays 2017, held in Moscow, Russia, in September 2017.The 41 revised full papers and one revised short paper presented were carefully reviewed and selected from 120 submissions. The papers are organized in topical sections on parallel algorithms; supercomputer simulation; high performance architectures, tools and technologies.

High Performance Computing - 4th Latin American Conference, CARLA 2017, Buenos Aires, Argentina, and Colonia del Sacramento,... High Performance Computing - 4th Latin American Conference, CARLA 2017, Buenos Aires, Argentina, and Colonia del Sacramento, Uruguay, September 20-22, 2017, Revised Selected Papers (Paperback, 1st ed. 2018)
Esteban Mocskos, Sergio Nesmachnow
R1,449 Discovery Miles 14 490 Ships in 18 - 22 working days

This book constitutes the proceedings of the 4th Latin American Conference on High Performance Computing, CARLA 2017, held in Buenos Aires, Argentina, and Colonia del Sacramento, Uruguay, in September 2017. The 29 papers presented in this volume were carefully reviewed and selected from 50 submissions. They are organized in topical sections named: HPC infrastructures and datacenters; HPC industry and education; GPU, multicores, accelerators; HPC applications and tools; big data and data management; parallel and distributed algorithms; Grid, cloud and federations.

Tools for High Performance Computing 2013 - Proceedings of the 7th International Workshop on Parallel Tools for High... Tools for High Performance Computing 2013 - Proceedings of the 7th International Workshop on Parallel Tools for High Performance Computing, September 2013, ZIH, Dresden, Germany (Paperback, Softcover reprint of the original 1st ed. 2014)
Andreas Knupfer, Jose Gracia, Wolfgang E. Nagel, Michael M Resch
R2,965 Discovery Miles 29 650 Ships in 18 - 22 working days

Current advances in High Performance Computing (HPC) increasingly impact efficient software development workflows. Programmers for HPC applications need to consider trends such as increased core counts, multiple levels of parallelism, reduced memory per core, and I/O system challenges in order to derive well performing and highly scalable codes. At the same time, the increasing complexity adds further sources of program defects. While novel programming paradigms and advanced system libraries provide solutions for some of these challenges, appropriate supporting tools are indispensable. Such tools aid application developers in debugging, performance analysis, or code optimization and therefore make a major contribution to the development of robust and efficient parallel software. This book introduces a selection of the tools presented and discussed at the 7th International Parallel Tools Workshop, held in Dresden, Germany, September 3-4, 2013.

Contemporary High Performance Computing - From Petascale toward Exascale, Volume 3 (Hardcover): Jeffrey S. Vetter Contemporary High Performance Computing - From Petascale toward Exascale, Volume 3 (Hardcover)
Jeffrey S. Vetter
R3,592 Discovery Miles 35 920 Ships in 18 - 22 working days

Contemporary High Performance Computing: From Petascale toward Exascale, Volume 3 focuses on the ecosystems surrounding the world's leading centers for high performance computing (HPC). It covers many of the important factors involved in each ecosystem: computer architectures, software, applications, facilities, and sponsors. This third volume will be a continuation of the two previous volumes, and will include other HPC ecosystems using the same chapter outline: description of a flagship system, major application workloads, facilities, and sponsors. Features: Describes many prominent, international systems in HPC from 2015 through 2017 including each system's hardware and software architecture Covers facilities for each system including power and cooling Presents application workloads for each site Discusses historic and projected trends in technology and applications Includes contributions from leading experts Designed for researchers and students in high performance computing, computational science, and related areas, this book provides a valuable guide to the state-of-the art research, trends, and resources in the world of HPC.

Introduction to HPC with MPI for Data Science (Paperback, 1st ed. 2016): Frank Nielsen Introduction to HPC with MPI for Data Science (Paperback, 1st ed. 2016)
Frank Nielsen
R2,082 Discovery Miles 20 820 Ships in 18 - 22 working days

This gentle introduction to High Performance Computing (HPC) for Data Science using the Message Passing Interface (MPI) standard has been designed as a first course for undergraduates on parallel programming on distributed memory models, and requires only basic programming notions. Divided into two parts the first part covers high performance computing using C++ with the Message Passing Interface (MPI) standard followed by a second part providing high-performance data analytics on computer clusters. In the first part, the fundamental notions of blocking versus non-blocking point-to-point communications, global communications (like broadcast or scatter) and collaborative computations (reduce), with Amdalh and Gustafson speed-up laws are described before addressing parallel sorting and parallel linear algebra on computer clusters. The common ring, torus and hypercube topologies of clusters are then explained and global communication procedures on these topologies are studied. This first part closes with the MapReduce (MR) model of computation well-suited to processing big data using the MPI framework. In the second part, the book focuses on high-performance data analytics. Flat and hierarchical clustering algorithms are introduced for data exploration along with how to program these algorithms on computer clusters, followed by machine learning classification, and an introduction to graph analytics. This part closes with a concise introduction to data core-sets that let big data problems be amenable to tiny data problems. Exercises are included at the end of each chapter in order for students to practice the concepts learned, and a final section contains an overall exam which allows them to evaluate how well they have assimilated the material covered in the book.

High-Performance Computing in Finance - Problems, Methods, and Solutions (Hardcover): M. A. H. Dempster, Juho Kanniainen, John... High-Performance Computing in Finance - Problems, Methods, and Solutions (Hardcover)
M. A. H. Dempster, Juho Kanniainen, John Keane, Erik Vynckier
R5,366 Discovery Miles 53 660 Ships in 10 - 15 working days

High-Performance Computing (HPC) delivers higher computational performance to solve problems in science, engineering and finance. There are various HPC resources available for different needs, ranging from cloud computing- that can be used without much expertise and expense - to more tailored hardware, such as Field-Programmable Gate Arrays (FPGAs) or D-Wave's quantum computer systems. High-Performance Computing in Finance is the first book that provides a state-of-the-art introduction to HPC for finance, capturing both academically and practically relevant problems.

High Performance Parallel I/O (Paperback): Prabhat, Quincey Koziol High Performance Parallel I/O (Paperback)
Prabhat, Quincey Koziol
R2,002 Discovery Miles 20 020 Ships in 10 - 15 working days

Gain Critical Insight into the Parallel I/O Ecosystem Parallel I/O is an integral component of modern high performance computing (HPC), especially in storing and processing very large datasets to facilitate scientific discovery. Revealing the state of the art in this field, High Performance Parallel I/O draws on insights from leading practitioners, researchers, software architects, developers, and scientists who shed light on the parallel I/O ecosystem. The first part of the book explains how large-scale HPC facilities scope, configure, and operate systems, with an emphasis on choices of I/O hardware, middleware, and applications. The book then traverses up the I/O software stack. The second part covers the file system layer and the third part discusses middleware (such as MPIIO and PLFS) and user-facing libraries (such as Parallel-NetCDF, HDF5, ADIOS, and GLEAN). Delving into real-world scientific applications that use the parallel I/O infrastructure, the fourth part presents case studies from particle-in-cell, stochastic, finite volume, and direct numerical simulations. The fifth part gives an overview of various profiling and benchmarking tools used by practitioners. The final part of the book addresses the implications of current trends in HPC on parallel I/O in the exascale world.

Understanding Supercomputing (Hardcover): Scientific American Understanding Supercomputing (Hardcover)
Scientific American
R420 Discovery Miles 4 200 Ships in 18 - 22 working days

Also Available as an eBook

We're all familiar with computers and the concept of doing work via these silicon-chip-driven modern wonders. The technological advances have been stunning: a typical handheld computing device today has more computing power than a 1960s computer that took up an entire room. In today's world, computing size is inversely proportional to computer speed: The smaller the computer, the faster it works. With computing speed just about doubling every eighteen months, today's processing power is more than 100 million times that of a computer in 1970.

What does the future hold for computers and their ever-growing power? In Scientific American's UNDERSTANDING SUPERCOMPUTING, you'll discover what constitutes a "supercomputer," how supercomputers function, and how you can make your own computer into a super machine (it's a matter of networking). From a chess computer that can beat the world's greatest human player to machines that control satellite communications, find out what tomorrow holds in store for supercomputers in terms of hardware, software, and everyday applications.

High-Performance Computing - 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International... High-Performance Computing - 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised Selected Papers (Paperback, 2008 ed.)
Jesus Labarta, Kazuki Joe, Toshinori Sato
R1,475 Discovery Miles 14 750 Ships in 18 - 22 working days

This book constitutes the refereed joint post-conference proceedings of the 6th International Symposium on High-Performance Computing, ISHPC 2005, held in, Japan, in 2005. It also includes the refereed post-proceedings of the First International Workshop on Advanced Low Power Systems 2006, ALPS2006, and some from the Workshop on Applications for PetaFLOPS Computing, APC 2005. A total of 42 papers were carefully selected from 76 submissions, covering a huge range of topics.

High Performance Computing - HiPC 2007 - 14th International Conference, Goa, India, December 18-21, 2007, Proceedings... High Performance Computing - HiPC 2007 - 14th International Conference, Goa, India, December 18-21, 2007, Proceedings (Paperback, 2007 ed.)
Srinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna
R2,760 Discovery Miles 27 600 Ships in 18 - 22 working days

This book constitutes the refereed proceedings of the 14th International Conference on High-Performance Computing, HiPC 2007, held in Goa, India, in December 2007.

The 53 revised full papers presented together with the abstracts of 5 keynote talks were carefully reviewed and selected from 253 submissions. The papers are organized in topical sections on applications on I/O and FPGAs, microarchitecture and multiprocessor architecture, applications of novel architectures, system software, scheduling, energy-aware computing, P2P and internet applications, communication and routing, cluster and grid applications, as well as mobile computing.

High Performance Computing - HiPC 2005 - 12th International Conference, Goa, India, December 18-21, 2005, Proceedings... High Performance Computing - HiPC 2005 - 12th International Conference, Goa, India, December 18-21, 2005, Proceedings (Paperback, 2005 ed.)
David A. Bader, Manish Parashar, V. Sridhar, Viktor K. Prasanna
R1,492 Discovery Miles 14 920 Ships in 18 - 22 working days

to acknowledge the dedicated effort put forth by the Vice-Chairs: Michael A. Bender (Algorithms), Zhiwei Xu (Applications), Jose Duato (Architecture), M. Cristina Pinotti (Communication Networks), and Satoshi Matsuoka (System Software). Without their help and timely work, the quality of this program would not be as high nor would the process have run so smoothly. I thank the other organizers who have contributed to assembling this program, - cludingthose who organizedthe keynotes, tutorials, workshops, awards, poster session, industry exhibits, and those who performed the administrative functions that have been essential to the success of this conference. The work of Sushil K. Prasad in putting - gethertheconferenceproceedingsisalsoacknowledged, aswell asthesupportprovided by Kamesh Madduri and Vaddadi Chandu, Ph.D. students at Georgia Institute of Te- nology, and Vipin Sachdeva, M.S. student at the Universityof New Mexico, in assisting with the EDAS online paper submission and evaluation software. Last, but certainly not least, I express heart-felt thanks to our General Co-chairs, Manish Parashar and V. Sridhar; Steering Chair, Viktor Prasanna; and to the Vice-General Chair, Rajendra V. Boppana; for all their useful advice. Lastly, I thank the Conference General Co-chairs for allowing me to serve our c- munity as the Program Chair of this high-quality international conference. It has been my pleasure to correspond with so many of you, and I personally welcome you to Go

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