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Behavioral Intervals in Embedded Software - Timing and Power Analysis of Embedded Real-Time Software Processes (Hardcover, 2nd ed.)
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Behavioral Intervals in Embedded Software - Timing and Power Analysis of Embedded Real-Time Software Processes (Hardcover, 2nd ed.)
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Behavioral Intervals in Embedded Software introduces a
comprehensive approach to timing, power, and communication analysis
of embedded software processes. Embedded software timing, power and
communication are typically not unique but occur in intervals which
result from data dependent behavior, environment timing and target
system properties.
In system design, these intervals are used in many ways. In some
cases, only the worst case is of interest, e.g. for single
processor schedulability analysis, in another context both best and
worst cases are relevant, such as for multiprocessor scheduling. In
all these cases, these behavioral intervals of the individual
software processes are fundamental data needed to analyze system
behavior. With growing importance of embedded software, formal
analysis of behavioral intervals has met increasing interest. Major
contributions were the introduction of implicit path enumeration
and the inclusion of cache analysis. While all approaches are
conservative, i.e. all possible timing behavior (or communication,
power consumption) is included in the resulting intervals, the main
differences are in the architecture features that are covered by
the hardware model and the width of the conservative interval. The
closer this interval to the real timing bounds, the higher is the
practical use of formal analysis.
The current analysis techniques leverage on previous work in
compiler technology by using basic blocks as elementary units for
architecture modeling and path analysis. The work presented here
opens a new direction moving from basic block based analysis to an
analysis based on larger program segments with a single execution
path. Such program segmentsfrequently extend over many basic
blocks, in particular in embedded system applications.
The approach combines the generality and accuracy of formal
analysis with the modeling precision of cycle true simulation
without compromising formal completeness. The results show that
with this combination of tracing and formal analysis both higher
precision than previous approaches leading to tighter and more
realistic intervals can be obtained and easier adaptation due to
the use of standard off-the-shelf cache simulators, cycle-true
processor models or evaluation boards is possible.
Behavioral Intervals in Embedded Software will be a useful
reference for academics as well as research scientists who are
active in the field of Design Automation and Embedded Systems.
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