Digital VLSI Design with Verilog - A Textbook from Silicon Valley Polytechnic Institute (Hardcover, 2nd ed. 2014)

This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book. A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test. A concluding presentation of special topics includes System Verilog and Verilog-AMS.

General

Imprint:	Springer International Publishing AG
Country of origin:	Switzerland
Release date:	July 2014
First published:	2014
Authors:	John-Michael Williams
Dimensions:	235 x 155 x 27mm (L x W x T)
Format:	Hardcover
Pages:	553
Edition:	2nd ed. 2014
ISBN-13:	978-3-319-04788-1
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	3-319-04788-4
Barcode:	9783319047881

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