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Design, Analysis and Test of Logic Circuits Under Uncertainty (Hardcover, 2012) Loot Price: R3,194
Discovery Miles 31 940
Repayment Terms: R299 pm x 12*
You Save: R721 (18%)
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Design, Analysis and Test of Logic Circuits Under Uncertainty (Hardcover, 2012): Smita Krishnaswamy, Igor L Markov, John P....

Design, Analysis and Test of Logic Circuits Under Uncertainty (Hardcover, 2012)

Smita Krishnaswamy, Igor L Markov, John P. Hayes

Series: Lecture Notes in Electrical Engineering, 115

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List price R3,915 Loot Price R3,194 Discovery Miles 31 940 | Repayment Terms: R299 pm x 12* You Save R721 (18%)

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Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.

General

Imprint: Springer
Country of origin: Netherlands
Series: Lecture Notes in Electrical Engineering, 115
Release date: September 2012
First published: 2013
Authors: Smita Krishnaswamy • Igor L Markov • John P. Hayes
Dimensions: 235 x 155 x 9mm (L x W x T)
Format: Hardcover
Pages: 124
Edition: 2012
ISBN-13: 978-90-481-9643-2
Categories: Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN: 90-481-9643-4
Barcode: 9789048196432

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