Driven by applications such as telecommunications, computing and
consumer/multimedia and facilitated by the progress in CMOS ULSI
technology, the microelectronics IC market is characterized by an
ever-increasing level of integration complexity. Today complete
systems, that previously occupied one or more boards, are
integrated on a few chips or even on one single multi-million
transistor chip - a so called System-on-Chip (SoC). Although most
functions in such integrated systems are implemented with digital
or digital signal processing circuitry, the analog circuits needed
at the interface between the electronic system and the
continuous-valued outside world are also being integrated on the
same die for reasons of cost and performance.
Unfortunately, the integration of both analog & RF circuits
and digital circuits on the same die not only offers many benefits,
but also creates some technical difficulties. Since the analog
circuits exploit the low-level physics of the fabrication process,
they remain difficult and costly to design, but they are also
vulnerable to any kind of noise or crosstalk signals. The higher
levels of integration (moving towards 100 million transistors per
chip clocked at ever higher frequencies) make the mixed-signal
signal integrity problem increasingly challenging. One of the most
important problems is the parasitic supply and substrate noise
coupling, caused by the fast switching of the digital circuitry
that then propagates to the sensitive analog circuitry via the
common substrate. It is therefore important to be able to predict
the impact of digital switching noise on the analog circuit
performance at the design stage of the integrated system, beforethe
chip is taped out for fabrication, and to understand how this
problem can be reduced.
The purpose of Substrate Noise Coupling in Mixed-Signal ASICs is
to provide an overview of very recent research results in the field
of substrate noise analysis and reduction techniques. Much of the
reported work has been established as part of the Mixed-Signal
Initiative of the European Union. It is a representative sampling
of the current state of the art in this area. All the different
aspects of the substrate noise coupling problem are covered. Some
chapters describe techniques to model and reduce the digital
switching noise injected in the substrate. Other chapters describe
methods to analyse the propagation of the noise from the source
(the digital circuitry) to the reception point (the embedded analog
circuitry) through the substrate considered as a
resistive/capacitive mesh. Finally, the remaining chapters describe
techniques to model and especially to reduce the impact of
substrate noise on the analog side. This is illustrated with
several practical design examples and measurement results.
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