Timing Performance of Nanometer Digital Circuits Under Process Variations (Hardcover, 1st ed. 2018)

This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level "design hints" are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.

General

Imprint:	Springer International Publishing AG
Country of origin:	Switzerland
Series:	Frontiers in Electronic Testing, 39
Release date:	April 2018
First published:	2018
Authors:	Victor Champac • Jose Garcia Gervacio
Dimensions:	235 x 155mm (L x W)
Format:	Hardcover
Pages:	185
Edition:	1st ed. 2018
ISBN-13:	978-3-319-75464-2
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	3-319-75464-5
Barcode:	9783319754642

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