Die-stacking Architecture (Paperback)

The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

General

Imprint:	Springer International Publishing AG
Country of origin:	Switzerland
Series:	Synthesis Lectures on Computer Architecture
Release date:	June 2015
First published:	2015
Authors:	Yuan Xie • Jishen Zhao
Dimensions:	235 x 191mm (L x W)
Format:	Paperback
Pages:	113
ISBN-13:	978-3-03-100619-7
Languages:	English
Subtitles:	English
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	3-03-100619-4
Barcode:	9783031006197

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