This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.

This Festschrift is in honor of Marilyn Wolf, on the occasion of her 60th birthday. Prof. Wolf is a renowned researcher and educator in Electrical and Computer Engineering, who has made pioneering contributions in all of the major areas in Embedded, Cyber-Physical, and Internet of Things (IoT) Systems. This book provides a timely collection of contributions that cover important topics related to Smart Cameras, Hardware/Software Co-Design, and Multimedia applications. Embedded systems are everywhere; cyber-physical systems enable monitoring and control of complex physical processes with computers; and IoT technology is of increasing relevance in major application areas, including factory automation, and smart cities. Smart cameras and multimedia technologies introduce novel opportunities and challenges in embedded, cyber-physical and IoT applications. Advanced hardware/software co-design methodologies provide valuable concepts and tools for addressing these challenges. The diverse topics of the chapters in this Festschrift help to reflect the great breadth and depth of Marilyn Wolf's contributions in research and education. The chapters have been written by some of Marilyn's closest collaborators and colleagues.

This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.

This Festschrift is in honor of Marilyn Wolf, on the occasion of her 60th birthday. Prof. Wolf is a renowned researcher and educator in Electrical and Computer Engineering, who has made pioneering contributions in all of the major areas in Embedded, Cyber-Physical, and Internet of Things (IoT) Systems. This book provides a timely collection of contributions that cover important topics related to Smart Cameras, Hardware/Software Co-Design, and Multimedia applications. Embedded systems are everywhere; cyber-physical systems enable monitoring and control of complex physical processes with computers; and IoT technology is of increasing relevance in major application areas, including factory automation, and smart cities. Smart cameras and multimedia technologies introduce novel opportunities and challenges in embedded, cyber-physical and IoT applications. Advanced hardware/software co-design methodologies provide valuable concepts and tools for addressing these challenges. The diverse topics of the chapters in this Festschrift help to reflect the great breadth and depth of Marilyn Wolf's contributions in research and education. The chapters have been written by some of Marilyn's closest collaborators and colleagues.

This book presents the overall vision and research outcomes of Nano-Tera.ch, which is a landmark Swiss federal program to advance engineering system and device technologies with applications to Health and the Environment, including smart Energy generation and consumption. The authors discuss this unprecedented nation-wide program, with a lifetime of almost 10 years and a public funding of more than 120 MCHF, which helped to position Switzerland at the forefront of the research on multi-scale engineering of complex systems and networks, and strongly impacted the Swiss landscape in Engineering Sciences.

Nanosystems use new, nanoscopic electrical and/or mechanical devices which, as constituents of electronic and electromechanical systems, find application primarily in computing, embedded control and biomedical data acquisition. In particular, this book will deal with the characterization and patterning of these materials from an engineering perspective, with the objective of creating operational prototypes and products. The book will integrate various nano technologies on materials, devices and systems and identify key areas and results. The book will describe different design aspects for integrated systems on silicon, as well as on heterogeneous platforms including, but not limited to, electrical, optical, micromechanical and biological components in various forms and mixtures. By associating research topics from differing horizons, the book will provide a unique opportunity to bridge the gap between electronics/electrical engineering and materials science. The book will include topics at the intersection of these disciplines, and will interface with computer science, biology and medicine.

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints. Dynamic Power Management: Design Techniques and CAD Tools addresses design techniques and computer-aided design solutions for power management. Different approaches are presented and organized in an order related to their applicability to control-units, macro-blocks, digital circuits and electronic systems, respectively. All approaches are based on the principle of exploiting idleness of circuits, systems, or portions thereof. They involve both the detection of idleness conditions and the freezing of power-consuming activities in the idle components. The book also describes some approaches to system-level power management, including Microsoft's OnNow architecture and the `Advanced Configuration and Power Management' standard proposed by Intel, Microsoft and Toshiba. These approaches migrate power management to the software layer running on hardware platforms, thus providing a flexible and self-configurable solution to adapting the power/performance tradeoff to the needs of mobile (and fixed) computing and communication. Dynamic Power Management: Design Techniques and CAD Tools is of interest to researchers and developers of computer-aided design tools for integrated circuits and systems, as well as to system designers.

This book contains extended and revised versions of the best papers presented during the fourteenth IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration. This conference provides a forum to exchange ideas and show industrial and academic research results in microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels.

Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of efficient data-path control-unit is the major contribution of this book. Three requirements are important in modeling ASIC designs: concurrency, external synchronization, and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis.

This book contains extended and revised versions of the best papers presented during the fourteenth IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration. This conference provides a forum to exchange ideas and show industrial and academic research results in microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels.

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints. Dynamic Power Management: Design Techniques and CAD Tools addresses design techniques and computer-aided design solutions for power management. Different approaches are presented and organized in an order related to their applicability to control-units, macro-blocks, digital circuits and electronic systems, respectively. All approaches are based on the principle of exploiting idleness of circuits, systems, or portions thereof. They involve both the detection of idleness conditions and the freezing of power-consuming activities in the idle components. The book also describes some approaches to system-level power management, including Microsoft's OnNow architecture and the Advanced Configuration and Power Management' standard proposed by Intel, Microsoft and Toshiba. These approaches migrate power management to the software layer running on hardware platforms, thus providing a flexible and self-configurable solution to adapting the power/performance tradeoff to the needs of mobile (and fixed) computing and communication. Dynamic Power Management: Design Techniques and CAD Tools is of interest to researchers and developers of computer-aided design tools for integrated circuits and systems, as well as to system designers.

Concurrent design, or co-design of hardware and software is extremely important for meeting design goals, such as high performance, that are the key to commercial competitiveness. Hardware/Software Co-Design covers many aspects of the subject, including methods and examples for designing: (1) general purpose and embedded computing systems based on instruction set processors; (2) telecommunication systems using general purpose digital signal processors as well as application specific instruction set processors; (3) embedded control systems and applications to automotive electronics. The book also surveys the areas of emulation and prototyping systems with field programmable gate array technologies, hardware/software synthesis and verification, and industrial design trends. Most contributions emphasize the design methodology, the requirements and state of the art of computer aided co-design tools, together with current design examples.

Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of efficient data-path control-unit is the major contribution of this book. Three requirements are important in modeling ASIC designs: concurrency, external synchronization, and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis.

Synthesis is a crucial component of future CAll s;ystems. The competitive edge of IC desiBn will most probcbly come frc*'1l the use of effective synthesis tools. A complete synthesis system should generate layout masks from a high-level algorithmic, behavioral or functional des- cription of a VLSI systen, [1 description of the target tech- nology and a description of the constraints and cost func- tions. The design should be completed in reasonable time and with the quality a human designer could obtain. Working designs have been produced with silicon compilers, but the quality of the design has always been a problem. ~n1ile for a restricted class of designs, such 2S Digital Signal Processors (DSP) , the use of a fixed floor-plan has been successful, its use for less constrp.ined applications results in inefficient utilizstion of areE and poor perfor- mance. In addition, the structure of the control logic is of- ten too rigid end not optimized, thus yielding F: slm'! and large chip. The present trend is to bre8t: the synthesis pro- cess into stages, end to use tools thet optimize rep.l estate Bnd/or performance to go from one stege to the next. This book covers most of the topics in the design of di- gital VLSI Circuits, 2nd focuses on theory, as well as algo- rithms and co~puter implementations of desiGn systems.

Synthesis is a crucial component of future CAll s;ystems. The competitive edge of IC desiBn will most probcbly come frc*'1l the use of effective synthesis tools. A complete synthesis system should generate layout masks from a high-level algorithmic, behavioral or functional des- cription of a VLSI systen, [1 description of the target tech- nology and a description of the constraints and cost func- tions. The design should be completed in reasonable time and with the quality a human designer could obtain. Working designs have been produced with silicon compilers, but the quality of the design has always been a problem. ~n1ile for a restricted class of designs, such 2S Digital Signal Processors (DSP) , the use of a fixed floor-plan has been successful, its use for less constrp.ined applications results in inefficient utilizstion of areE and poor perfor- mance. In addition, the structure of the control logic is of- ten too rigid end not optimized, thus yielding F: slm'! and large chip. The present trend is to bre8t: the synthesis pro- cess into stages, end to use tools thet optimize rep.l estate Bnd/or performance to go from one stege to the next. This book covers most of the topics in the design of di- gital VLSI Circuits, 2nd focuses on theory, as well as algo- rithms and co~puter implementations of desiGn systems.

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution.
This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.
* Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends
* An integrated presentation not currently available in any other book
* A thorough introduction to current design methodologies and chips designed with NoCs

Nanosystems use new, nanoscopic electrical and/or mechanical devices which, as constituents of electronic and electromechanical systems, find application primarily in computing, embedded control and biomedical data acquisition. In particular, this book will deal with the characterization and patterning of these materials from an engineering perspective, with the objective of creating operational prototypes and products.

The book will integrate various nano technologies on materials, devices and systems and identify key areas and results. The book will describe different design aspects for integrated systems on silicon, as well as on heterogeneous platforms including, but not limited to, electrical, optical, micromechanical and biological components in various forms and mixtures. By associating research topics from differing horizons, the book will provide a unique opportunity to bridge the gap between electronics/electrical engineering and materials science. The book will include topics at the intersection of these disciplines, and will interface with computer science, biology and medicine.

Embedded system designers are constantly looking for new tools and techniques to help satisfy the exploding demand for consumer information appliances and specialized industrial products. One critical barrier to the timely release of embedded system products is integrating the design of the hardware and software systems. Hardware/software co-design is a set of methodologies and techniques specifically created to support the concurrent design of both systems, effectively reducing multiple iterations and major redesigns. In addition to its critical role in the development of embedded systems, many experts believe that co-design will be a key design methodology for Systems-on-a-Chip.

"Readings in Hardware/Software Co-Design" presents the papers that have shaped the hardware/software co-design field since its inception in the early 90s. Field experts -- Giovanni De Micheli, Rolf Ernst, and Wayne Wolf -- introduce sections of the book, and provide context for the paper that follow. This collection provides professionals, researchers and graduate students with a single reference source for this critical aspect of computing design.
* Over 50 peer-reviewed papers written from leading researchers and designers in the field
* Selected, edited, and introduced by three of the fields' most eminent researchers and educators
* Accompanied by an annually updated companion Web site with links and references to recently published papers, providing a forum for the editors to comment on how recent work continues or breaks with previous work in the field