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High Level Synthesis of ASICs under Timing and Synchronization Constraints (Paperback, Softcover reprint of hardcover 1st ed. 1992) Loot Price: R4,233
Discovery Miles 42 330
High Level Synthesis of ASICs under Timing and Synchronization Constraints (Paperback, Softcover reprint of hardcover 1st ed....

High Level Synthesis of ASICs under Timing and Synchronization Constraints (Paperback, Softcover reprint of hardcover 1st ed. 1992)

David C. Ku, Giovanni De Micheli

Series: The Springer International Series in Engineering and Computer Science, 177

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Loot Price R4,233 Discovery Miles 42 330 | Repayment Terms: R397 pm x 12*

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Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of efficient data-path control-unit is the major contribution of this book. Three requirements are important in modeling ASIC designs: concurrency, external synchronization, and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis.

General

Imprint: Springer-Verlag New York
Country of origin: United States
Series: The Springer International Series in Engineering and Computer Science, 177
Release date: November 2010
First published: 1992
Authors: David C. Ku • Giovanni De Micheli
Dimensions: 235 x 155 x 16mm (L x W x T)
Format: Paperback
Pages: 294
Edition: Softcover reprint of hardcover 1st ed. 1992
ISBN-13: 978-1-4419-5129-8
Categories: Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD)
Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
LSN: 1-4419-5129-6
Barcode: 9781441951298

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