High-Level Power Analysis and Optimization (Paperback, Softcover reprint of the original 1st ed. 1998)

High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Release date:	November 2012
First published:	November 2012
Authors:	Anand Raghunathan • Niraj K. Jha • Sujit Dey
Dimensions:	254 x 178 x 8mm (L x W x T)
Format:	Paperback
Pages:	175
Edition:	Softcover reprint of the original 1st ed. 1998
ISBN-13:	978-1-4613-7481-7
Categories:	Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD) Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Promotions
LSN:	1-4613-7481-2
Barcode:	9781461374817

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