VLSI Physical Design: From Graph Partitioning to Timing Closure (Paperback, 2011 ed.)

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. "VLSI Physical Design: From Graph Partitioning to Timing Closure" introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

General

Imprint:	Springer
Country of origin:	Netherlands
Release date:	October 2014
First published:	2011
Authors:	Andrew B. Kahng • Jens Lienig • Igor L Markov • Jin Hu
Dimensions:	235 x 155 x 23mm (L x W x T)
Format:	Paperback
Pages:	310
Edition:	2011 ed.
ISBN-13:	978-9400790209
Languages:	English
Subtitles:	English
Categories:	Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD) Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General Promotions
LSN:	9400790201
Barcode:	9789400790209

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