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Delay Fault Testing for VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1998) Loot Price: R4,323
Discovery Miles 43 230
Delay Fault Testing for VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1998): Angela Krstic, Kwang-Ting...

Delay Fault Testing for VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1998)

Angela Krstic, Kwang-Ting (Tim) Cheng

Series: Frontiers in Electronic Testing, 14

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Loot Price R4,323 Discovery Miles 43 230 | Repayment Terms: R405 pm x 12*

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With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the current design trend of moving towards deep submicron devices. After a long period of prevailing belief that high stuck-at fault coverage is sufficient to guarantee high quality of shipped products, the industry is now forced to rethink other types of testing. Delay testing has been a topic of extensive research both in industry and in academia for more than a decade. As a result, several delay fault models and numerous testing methodologies have been proposed. Delay Fault Testing for VLSI Circuits presents a selection of existing delay testing research results. It combines introductory material with state-of-the-art techniques that address some of the current problems in delay testing. Delay Fault Testing for VLSI Circuits covers some basic topics such as fault modeling and test application schemes for detecting delay defects.It also presents summaries and conclusions of several recent case studies and experiments related to delay testing. A selection of delay testing issues and test techniques such as delay fault simulation, test generation, design for testability and synthesis for testability are also covered. Delay Fault Testing for VLSI Circuits is intended for use by CAD and test engineers, researchers, tool developers and graduate students. It requires a basic background in digital testing. The book can used as supplementary material for a graduate-level course on VLSI testing.

General

Imprint: Springer-Verlag New York
Country of origin: United States
Series: Frontiers in Electronic Testing, 14
Release date: October 2012
First published: October 2012
Authors: Angela Krstic • Kwang-Ting (Tim) Cheng
Dimensions: 235 x 155 x 11mm (L x W x T)
Format: Paperback
Pages: 191
Edition: Softcover reprint of the original 1st ed. 1998
ISBN-13: 978-1-4613-7561-6
Categories: Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD)
Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
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LSN: 1-4613-7561-4
Barcode: 9781461375616

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