Design for AT-Speed Test, Diagnosis and Measurement (Paperback, Softcover reprint of the original 1st ed. 2000)

Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a 'must read' before any DFT is attempted.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Series:	Frontiers in Electronic Testing, 15
Release date:	April 2013
First published:	2000
Editors:	Benoit Nadeau-Dostie
Dimensions:	254 x 178 x 14mm (L x W x T)
Format:	Paperback
Pages:	239
Edition:	Softcover reprint of the original 1st ed. 2000
ISBN-13:	978-1-4757-8291-2
Categories:	Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Promotions
LSN:	1-4757-8291-8
Barcode:	9781475782912

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