Low-Noise Low-Power Design for Phase-Locked Loops - Multi-Phase High-Performance Oscillators (Paperback, Softcover reprint of the original 1st ed. 2015)

This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.

General

Imprint:	Springer International Publishing AG
Country of origin:	Switzerland
Release date:	August 2016
First published:	2015
Authors:	Feng Zhao • Fa Foster Dai
Dimensions:	235 x 155 x 6mm (L x W x T)
Format:	Paperback
Pages:	96
Edition:	Softcover reprint of the original 1st ed. 2015
ISBN-13:	978-3-319-34370-9
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Applied optics > General
LSN:	3-319-34370-X
Barcode:	9783319343709

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