The design of embedded systems warrants a new perspective because
of the following two reasons: Firstly, slow and energy inefficient
memory hierarchies have already become the bottleneck of the
embedded systems. It is documented in the literature as the memory
wall problem. Secondly, the software running on the contemporary
embedded devices is becoming increasingly complex. It is also well
understood that no silver bullet exists to solve the memory wall
problem. Therefore, this book explores a collaborative approach by
proposing novel memory hierarchies and software optimization
techniques for the optimal utilization of these memory hierarchies.
Linking memory architecture design with memory-architecture aware
compilation results in fast, energy-efficient and timing
predictable memory accesses.
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