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Hot-Carrier Reliability of MOS VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1993)
Loot Price: R5,560
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Hot-Carrier Reliability of MOS VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1993)
Series: The Springer International Series in Engineering and Computer Science, 227
Expected to ship within 10 - 15 working days
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As the complexity and the density of VLSI chips increase with
shrinking design rules, the evaluation of long-term reliability of
MOS VLSI circuits is becoming an important problem. The assessment
and improvement of reliability on the circuit level should be based
on both the failure mode analysis and the basic understanding of
the physical failure mechanisms observed in integrated circuits.
Hot-carrier induced degrada tion of MOS transistor characteristics
is one of the primary mechanisms affecting the long-term
reliability of MOS VLSI circuits. It is likely to become even more
important in future generation chips, since the down ward scaling
of transistor dimensions without proportional scaling of the
operating voltage aggravates this problem. A thorough understanding
of the physical mechanisms leading to hot-carrier related
degradation of MOS transistors is a prerequisite for accurate
circuit reliability evaluation. It is also being recognized that
important reliability concerns other than the post-manufacture
reliability qualification need to be addressed rigorously early in
the design phase. The development and use of accurate reliability
simulation tools are therefore crucial for early assessment and
improvement of circuit reliability : Once the long-term reliability
of the circuit is estimated through simulation, the results can be
compared with predetermined reliability specifications or limits.
If the predicted reliability does not satisfy the requirements,
appropriate design modifications may be carried out to improve the
resistance of the devices to degradation.
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