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Matrix Computations on Systolic-Type Arrays provides a framework
which permits a good understanding of the features and limitations
of processor arrays for matrix algorithms. It describes the
tradeoffs among the characteristics of these systems, such as
internal storage and communication bandwidth, and the impact on
overall performance and cost. A system which allows for the
analysis of methods for the design/mapping of matrix algorithms is
also presented. This method identifies stages in the design/mapping
process and the capabilities required at each stage. Matrix
Computations on Systolic-Type Arrays provides a much needed
description of the area of processor arrays for matrix algorithms
and of the methods used to derive those arrays. The ideas developed
here reduce the space of solutions in the design/mapping process by
establishing clear criteria to select among possible options as
well as by a-priori rejection of alternatives which are not
adequate (but which are considered in other approaches). The end
result is a method which is more specific than other techniques
previously available (suitable for a class of matrix algorithms)
but which is more systematic, better defined and more effective in
reaching the desired objectives. Matrix Computations on
Systolic-Type Arrays will interest researchers and professionals
who are looking for systematic mechanisms to implement matrix
algorithms either as algorithm-specific structures or using
specialized architectures. It provides tools that simplify the
design/mapping process without introducing degradation, and that
permit tradeoffs between performance/cost measures selected by the
designer.
Matrix Computations on Systolic-Type Arrays provides a framework
which permits a good understanding of the features and limitations
of processor arrays for matrix algorithms. It describes the
tradeoffs among the characteristics of these systems, such as
internal storage and communication bandwidth, and the impact on
overall performance and cost. A system which allows for the
analysis of methods for the design/mapping of matrix algorithms is
also presented. This method identifies stages in the design/mapping
process and the capabilities required at each stage. Matrix
Computations on Systolic-Type Arrays provides a much needed
description of the area of processor arrays for matrix algorithms
and of the methods used to derive those arrays. The ideas developed
here reduce the space of solutions in the design/mapping process by
establishing clear criteria to select among possible options as
well as by a-priori rejection of alternatives which are not
adequate (but which are considered in other approaches). The end
result is a method which is more specific than other techniques
previously available (suitable for a class of matrix algorithms)
but which is more systematic, better defined and more effective in
reaching the desired objectives. Matrix Computations on
Systolic-Type Arrays will interest researchers and professionals
who are looking for systematic mechanisms to implement matrix
algorithms either as algorithm-specific structures or using
specialized architectures. It provides tools that simplify the
design/mapping process without introducing degradation, and that
permit tradeoffs between performance/cost measures selected by the
designer.
Digital arithmetic plays an important role in the design of
general-purpose digital processors and of embedded systems for
signal processing, graphics, and communications. In spite of a
mature body of knowledge in digital arithmetic, each new generation
of processors or digital systems creates new arithmetic design
problems. Designers, researchers, and graduate students will find
solid solutions to these problems in this comprehensive,
state-of-the-art exposition of digital arithmetic.
Ercegovac and Lang, two of the field's leading experts, deliver a
unified treatment of digital arithmetic, tying underlying theory to
design practice in a technology-independent manner. They
consistently use an algorithmic approach in defining arithmetic
operations, illustrate concepts with examples of designs at the
logic level, and discuss cost/performance characteristics
throughout. Students and practicing designers alike will find
Digital Arithmetic a definitive reference and a consistent teaching
tool for developing a deep understanding of the "arithmetic style"
of algorithms and designs.
-Guides readers to develop sound solutions, avoid known mistakes,
and repeat successful design decisions.
-Presents comprehensive coverage3/4from fundamental theories to
current research trends.
-Written in a clear and engaging style by two masters of the
field.
-Concludes each chapter with in-depth discussions of the key
literature.
-Includes a full set of over 250 exercises, an on-line appendix
with solutions to one-third of the exercises and 600 lecture slides
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