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Matrix Computations on Systolic-Type Arrays (Paperback, Softcover reprint of the original 1st ed. 1992) Loot Price: R4,016
Discovery Miles 40 160
Matrix Computations on Systolic-Type Arrays (Paperback, Softcover reprint of the original 1st ed. 1992): Jaime Moreno, Tomas...

Matrix Computations on Systolic-Type Arrays (Paperback, Softcover reprint of the original 1st ed. 1992)

Jaime Moreno, Tomas Lang

Series: The Springer International Series in Engineering and Computer Science, 174

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Loot Price R4,016 Discovery Miles 40 160 | Repayment Terms: R376 pm x 12*

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Matrix Computations on Systolic-Type Arrays provides a framework which permits a good understanding of the features and limitations of processor arrays for matrix algorithms. It describes the tradeoffs among the characteristics of these systems, such as internal storage and communication bandwidth, and the impact on overall performance and cost. A system which allows for the analysis of methods for the design/mapping of matrix algorithms is also presented. This method identifies stages in the design/mapping process and the capabilities required at each stage. Matrix Computations on Systolic-Type Arrays provides a much needed description of the area of processor arrays for matrix algorithms and of the methods used to derive those arrays. The ideas developed here reduce the space of solutions in the design/mapping process by establishing clear criteria to select among possible options as well as by a-priori rejection of alternatives which are not adequate (but which are considered in other approaches). The end result is a method which is more specific than other techniques previously available (suitable for a class of matrix algorithms) but which is more systematic, better defined and more effective in reaching the desired objectives. Matrix Computations on Systolic-Type Arrays will interest researchers and professionals who are looking for systematic mechanisms to implement matrix algorithms either as algorithm-specific structures or using specialized architectures. It provides tools that simplify the design/mapping process without introducing degradation, and that permit tradeoffs between performance/cost measures selected by the designer.

General

Imprint: Springer-Verlag New York
Country of origin: United States
Series: The Springer International Series in Engineering and Computer Science, 174
Release date: September 2012
First published: 1992
Authors: Jaime Moreno • Tomas Lang
Dimensions: 235 x 155 x 17mm (L x W x T)
Format: Paperback
Pages: 280
Edition: Softcover reprint of the original 1st ed. 1992
ISBN-13: 978-1-4613-6604-1
Categories: Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Applied optics > General
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LSN: 1-4613-6604-6
Barcode: 9781461366041

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