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Books > Professional & Technical > Energy technology & engineering > Electrical engineering
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IDDQ Testing of VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1993)
Loot Price: R2,836
Discovery Miles 28 360
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IDDQ Testing of VLSI Circuits (Paperback, Softcover reprint of the original 1st ed. 1993)
Expected to ship within 10 - 15 working days
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Power supply current monitoring to detect CMOS IC defects during
production testing quietly laid down its roots in the mid-1970s.
Both Sandia Labs and RCA in the United States and Philips Labs in
the Netherlands practiced this procedure on their CMOS ICs. At that
time, this practice stemmed simply from an intuitive sense that
CMOS ICs showing abnormal quiescent power supply current (IDDQ)
contained defects. Later, this intuition was supported by data and
analysis in the 1980s by Levi (RACD, Malaiya and Su
(SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the
University of New Mexico), Jacomino and co-workers (Laboratoire
d'Automatique de Grenoble), and Maly and co-workers (Carnegie
Mellon University). Interest in IDDQ testing has advanced beyond
the data reported in the 1980s and is now focused on applications
and evaluations involving larger volumes of ICs that improve
quality beyond what can be achieved by previous conventional means.
In the conventional style of testing one attempts to propagate the
logic states of the suspended nodes to primary outputs. This is
done for all or most nodes of the circuit. For sequential circuits,
in particular, the complexity of finding suitable tests is very
high. In comparison, the IDDQ test does not observe the logic
states, but measures the integrated current that leaks through all
gates. In other words, it is like measuring a patient's temperature
to determine the state of health. Despite perceived advantages,
during the years that followed its initial announcements,
skepticism about the practicality of IDDQ testing prevailed. The
idea, however, provided a great opportunity to researchers. New
results on test generation, fault simulation, design for
testability, built-in self-test, and diagnosis for this style of
testing have since been reported. After a decade of research, we
are definitely closer to practice.
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