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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Paperback, Softcover reprint of hardcover 1st ed. 2008) Loot Price: R4,594
Discovery Miles 45 940
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Paperback,...

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Paperback, Softcover reprint of hardcover 1st ed. 2008)

Andrei Pavlov, Manoj Sachdev

Series: Frontiers in Electronic Testing, 40

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Loot Price R4,594 Discovery Miles 45 940 | Repayment Terms: R431 pm x 12*

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The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

General

Imprint: Springer
Country of origin: Netherlands
Series: Frontiers in Electronic Testing, 40
Release date: October 2010
First published: 2008
Authors: Andrei Pavlov • Manoj Sachdev
Dimensions: 235 x 155 x 11mm (L x W x T)
Format: Paperback
Pages: 194
Edition: Softcover reprint of hardcover 1st ed. 2008
ISBN-13: 978-90-481-7855-1
Categories: Books > Computing & IT > Computer hardware & operating systems > Storage media & peripherals
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
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LSN: 90-481-7855-X
Barcode: 9789048178551

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