Ideal for graduate and senior undergraduate courses in computer
arithmetic and advanced digital design, Computer Arithmetic:
Algorithms and Hardware Designs, Second Edition, provides a
balanced, comprehensive treatment of computer arithmetic. It covers
topics in arithmetic unit design and circuit implementation that
complement the architectural and algorithmic speedup techniques
used in high-performance computer architecture and parallel
processing. Using a unified and consistent framework, the text
begins with number representation and proceeds through basic
arithmetic operations, floating-point arithmetic, and function
evaluation methods. Later chapters cover broad design and
implementation topics-including techniques for high-throughput,
low-power, fault-tolerant, and reconfigurable arithmetic. An
appendix provides a historical view of the field and speculates on
its future. An indispensable resource for instruction, professional
development, and research, Computer Arithmetic: Algorithms and
Hardware Designs, Second Edition, combines broad coverage of the
underlying theories of computer arithmetic with numerous examples
of practical designs, worked-out examples, and a large collection
of meaningful problems. This second edition includes a new chapter
on reconfigurable arithmetic, in order to address the fact that
arithmetic functions are increasingly being implemented on
field-programmable gate arrays (FPGAs) and FPGA-like configurable
devices. Updated and thoroughly revised, the book offers new and
expanded coverage of saturating adders and multipliers, truncated
multipliers, fused multiply-add units, overlapped quotient digit
selection, bipartite and multipartite tables, reversible logic, dot
notation, modular arithmetic, Montgomery modular reduction,
division by constants, IEEE floating-point standard formats, and
interval arithmetic.
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