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VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers (Paperback, 1st ed. 2017) Loot Price: R3,033

Discovery Miles 30 330

Repayment Terms: R284 pm x 12*

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VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers...

VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers (Paperback, 1st ed. 2017)

Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh

Series: Communications in Computer and Information Science, 711

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Loot Price R3,033 Discovery Miles 30 330 | Repayment Terms: R284 pm x 12*

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This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017. The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

General

Imprint:	Springer Verlag, Singapore
Country of origin:	Singapore
Series:	Communications in Computer and Information Science, 711
Release date:	December 2017
First published:	2017
Editors:	Brajesh Kumar Kaushik • Sudeb Dasgupta • Virendra Singh
Dimensions:	235 x 155mm (L x W)
Format:	Paperback
Pages:	815
Edition:	1st ed. 2017
ISBN-13:	978-981-10-7469-1
Categories:	Books > Computing & IT > Computer hardware & operating systems > General Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Promotions
LSN:	981-10-7469-0
Barcode:	9789811074691