Design for Manufacturability and Yield for Nano-Scale CMOS walks
the reader through all the aspects of manufacturability and yield
in a nano-CMOS process and how to address each aspect at the proper
design step starting with the design and layout of standard cells
and how to yield-grade libraries for critical area and lithography
artifacts through place and route, CMP model based simulation and
dummy-fill insertion, mask planning, simulation and manufacturing,
and through statistical design and statistical timing closure of
the design. It alerts the designer to the pitfalls to watch for and
to the good practices that can enhance a design s manufacturability
and yield. This book is a must read book the serious practicing IC
designer and an excellent primer for any graduate student intent on
having a career in IC design or in EDA tool development."
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