This book presents the perspective of the project on a Paradigm
Unifying System Specification Environments for proven Electronic
design (PUS SEE) as conceived in the course of the research during
2002 -2003. The initial statement of the research was formulated as
follows: The objective of PUSSEE is to introduce the formal proof
of system properties throughout a modular system design methodology
that integrates sub-systems co-verification with system refinement
and reusability of virtual system components. This will be done by
combining the UML and B languages to allow the verification of
system specifications through the composition of proven sub-systems
(in particular interfaces, using the VSIAISLIF standard). The link
of B with C, VHDL and SystemC will extend the
correct-by-construction design process to lower system-on-chip
(SoC) development stages. Prototype tools will be developed for the
code generation from UML and B, and existing B verification tools
will be extended to support IP reuse, according to the VSI Alliance
work. The methodology and tools will be validated through the
development of three industrial applications: a wireless mobile
terminal-a telecom system-on-chip based on HIPERLANI2 protocol and
an anti-collision module for automobiles. The problem was known to
be hard and the scope ambitious. But the seventeen chapters that
follow, describing the main results obtained demonstrate the
success of the research, acknowledged by the European reviewers.
They are released to allow the largest audience to learn and take
benefit of.
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