Mainstream textbooks explain how electronic circuits work, but
cover very little on how to conceive them. That is the aim of this
monograph, namely to show readers how they can determine currents,
channel lengths and widths of CMOS circuits, so as to optimally
satisfy design specifications of electronic circuits. The idea
underlying the methodology described in this monograph consists in
the use of a set of Lookup Tables embodying device data extracted
from systematic runs done using an advanced circuit simulator, the
same as used for final design verifications. In this way, all
parameters put to use during the sizing procedure incorporate not
only the bearings of bias conditions and geometry, but also every
second-order effect present in the simulator’s model, in
particular short-channel effects. Consequently, the number of
verification simulations one has to perform is not only
substantially reduced, but the designer may concentrate on actual
design strategies without being bothered by inconsistencies caused
by poor models or inappropriate parameters. This monograph will be
of use to engineers and researchers who work on the design of
electronic circuits and systems.
General
Imprint: |
Now Publishers Inc
|
Country of origin: |
United States |
Series: |
Foundations and Trends® in Integrated Circuits and Systems |
Release date: |
May 2023 |
First published: |
2023 |
Authors: |
Paul G.A. Jespers
|
Dimensions: |
234 x 156mm (L x W) |
Pages: |
62 |
ISBN-13: |
978-1-63828-194-8 |
Categories: |
Books
Promotions
|
LSN: |
1-63828-194-7 |
Barcode: |
9781638281948 |
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