Books > Computing & IT > Computer communications & networking
|
Buy Now
Transactions on High-Performance Embedded Architectures and Compilers II (Paperback, 2009 ed.)
Loot Price: R1,553
Discovery Miles 15 530
|
|
Transactions on High-Performance Embedded Architectures and Compilers II (Paperback, 2009 ed.)
Series: Lecture Notes in Computer Science, 5470
Expected to ship within 10 - 15 working days
|
1 2 Per Stenstro ..m and David Whalley 1 Chalmers University of
Technology, Sweden 2 Florida State University, U.S.A. In
January2007,the secondedition in the series of International
Conferenceson High-Performance Embedded Architectures andCompilers
(HiPEAC'2007)was held in Ghent,Belgium.We were fortunate to attract
around70 submissions of whichonly19wereselected
forpresentation.Amongthese,weaskedtheauthors ofthe?vemost highly
rated contributionsto make extended versions ofthem. They all
accepted to do that andtheirarticles appear in this section ofthe
second volume.
The?rstarticlebyKeramidas,Xekalakis,andKaxirasfocusesontheincreased
power consumption in set-associativecaches.They presenta novel
approach to reduce dynamicpower that leverages on the previously
proposed cache decay approach that has been shown to reduce static
(or leakage) power. In the
secondarticlebyMagarajan,Gupta,andKrishnaswamythe focus ison
techniques to encrypt data in memory to preservedata integrity. The
problem with previous techniques is that the decryption latency
ends up on the critical memory access path. Especially in embedded
processors,caches are small and it isdi?cultto hide the decryption
latency. The authors propose a compiler-based strategy that manages
to reduce the impact of the decryption time signi?cantly. The
thirdarticlebyKluyskensandEeckhoutfocusesondetailedarchitectural
simulation techniques.It is well-known that they are
ine?cientandaremedy to the problem isto use sampling.When
usingsampling,onehastowarm up memory structures such as caches
andbranch predictors.Thispaper introduces a noveltechnique
calledBranchHistoryMatchingfore?cient warmupofbranch predictors.
The fourth articlebyBhadauria,McKee,Singh, and Tyson focuses on
static power consumptioninlarge caches.Theyintroduce a
reuse-distance drowsy cache mechanism that issimpleas well as
e?ective in reducingthestaticpower in caches.
General
Is the information for this product incomplete, wrong or inappropriate?
Let us know about it.
Does this product have an incorrect or missing image?
Send us a new image.
Is this product missing categories?
Add more categories.
Review This Product
No reviews yet - be the first to create one!
|
You might also like..
|
Email address subscribed successfully.
A activation email has been sent to you.
Please click the link in that email to activate your subscription.