0
Your cart

Your cart is empty

Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components

Buy Now

Parasitic Substrate Coupling in High Voltage Integrated Circuits - Minority and Majority Carriers Propagation in Semiconductor Substrate (Paperback, Softcover reprint of the original 1st ed. 2018) Loot Price: R2,957
Discovery Miles 29 570
Parasitic Substrate Coupling in High Voltage Integrated Circuits - Minority and Majority Carriers Propagation in Semiconductor...

Parasitic Substrate Coupling in High Voltage Integrated Circuits - Minority and Majority Carriers Propagation in Semiconductor Substrate (Paperback, Softcover reprint of the original 1st ed. 2018)

Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese

Series: Analog Circuits and Signal Processing

 (sign in to rate)
Loot Price R2,957 Discovery Miles 29 570 | Repayment Terms: R277 pm x 12*

Bookmark and Share

Expected to ship within 10 - 15 working days

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific protections.

General

Imprint: Springer Nature Switzerland AG
Country of origin: Switzerland
Series: Analog Circuits and Signal Processing
Release date: February 2019
First published: 2018
Authors: Pietro Buccella • Camillo Stefanucci • Maher Kayal • Jean-Michel Sallese
Dimensions: 235 x 155mm (L x W)
Format: Paperback
Pages: 183
Edition: Softcover reprint of the original 1st ed. 2018
ISBN-13: 978-3-03-008976-4
Categories: Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
LSN: 3-03-008976-2
Barcode: 9783030089764

Is the information for this product incomplete, wrong or inappropriate? Let us know about it.

Does this product have an incorrect or missing image? Send us a new image.

Is this product missing categories? Add more categories.

Review This Product

No reviews yet - be the first to create one!

Partners