Testing Static Random Access Memories - Defects, Fault Models and Test Patterns (Hardcover, 2004 ed.)

Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed.
Features:
-Fault primitive based analysis of memory faults,
-A complete framework of and classification memory faults,
-A systematic way to develop optimal and high quality memory test algorithms,
-A systematic way to develop test patterns for any multi-port SRAM,
-Challenges and trends in embedded memory testing.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Series:	Frontiers in Electronic Testing, 26
Release date:	March 2004
First published:	2004
Authors:	Said Hamdioui
Dimensions:	235 x 155 x 14mm (L x W x T)
Format:	Hardcover
Pages:	221
Edition:	2004 ed.
ISBN-13:	978-1-4020-7752-4
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials > Semi-conductors & super-conductors Promotions
LSN:	1-4020-7752-1
Barcode:	9781402077524

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