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Cache Configuration for High Performance Embedded Systems (Paperback)
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Cache Configuration for High Performance Embedded Systems (Paperback)
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Embedded computing systems are special-purpose computer systems
designed for applications to perform a specific task. With enormous
advancements in technology, embedded system applications range from
toys to avionics. The design of these systems involve challenging
metrics out which performance and power form the most crucial ones.
Recent advancements in semiconductor technology have made power
consumption also a limiting factor for embedded system design. SRAM
being faster than the DRAM, cache memory comprising of SRAM is
configured between the CPU and the main memory. The CPU can access
the main memory (DRAM) only via the cache memory. Cache memories
are employed in all the computing applications along with the
processors. The size of cache allowed for inclusion on a chip is
limited by the large physical size and large power consumption of
the SRAM cells used in cache memory. Hence, its effective
configuration for small size and low power consumption is very
crucial in embedded system design. An optimal cache configuration
technique is presented for the effective reduction of size and high
performance. It is also shown that not only the memory module, but
also the bus interconnect
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