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SystemVerilog for Design Second Edition - A Guide to Using SystemVerilog for Hardware Design and Modeling (Hardcover, 2nd ed. 2006)
Loot Price: R6,107
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SystemVerilog for Design Second Edition - A Guide to Using SystemVerilog for Hardware Design and Modeling (Hardcover, 2nd ed. 2006)
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SystemVerilog is a rich set of extensions to the IEEE 1364-2001
Verilog Hardware Description Language (Verilog HDL). These
extensions address two major aspects of HDL-based design. First,
modeling very large designs with concise, accurate, and intuitive
code. Second, writing high-level test programs to efficiently and
effectively verify these large designs. The first edition of this
book addressed the first aspect of the SystemVerilog extensions to
Verilog. Important modeling features were presented, such as
two-state data types, enumerated types, user-degined types,
structures, unions, and interfaces. Emphasis was placed on the
proper usage of these enhancements for simulation and synthesis.
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