Full-Chip Nanometer Routing Techniques (Hardcover, 2007 ed.)

At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Series:	Analog Circuits and Signal Processing
Release date:	August 2007
First published:	August 2007
Authors:	Tsung-Yi Ho • Yao-Wen Chang • Sao-jie Chen
Dimensions:	235 x 155 x 7mm (L x W x T)
Format:	Hardcover
Pages:	102
Edition:	2007 ed.
ISBN-13:	978-1-4020-6194-3
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
LSN:	1-4020-6194-3
Barcode:	9781402061943

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