Switch-Level Timing Simulation of MOS VLSI Circuits (Hardcover, 1989 ed.)

Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation."

General

Imprint:	Kluwer Academic Publishers
Country of origin:	United States
Series:	The Springer International Series in Engineering and Computer Science, 66
Release date:	February 2003
First published:	1989
Authors:	Vasant B. Rao • David V. Overhauser • Timothy N. Trick • Ibrahim N. Hajj
Dimensions:	234 x 156 x 14mm (L x W x T)
Format:	Hardcover
Pages:	210
Edition:	1989 ed.
ISBN-13:	978-0-89838-302-7
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Promotions
LSN:	0-89838-302-1
Barcode:	9780898383027

Is the information for this product incomplete, wrong or inappropriate? Let us know about it.

Does this product have an incorrect or missing image? Send us a new image.

Is this product missing categories? Add more categories.

Review This Product

No reviews yet - be the first to create one!