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High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications (Paperback, Softcover reprint of the original 1st ed. 2018)
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High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications (Paperback, Softcover reprint of the original 1st ed. 2018)
Series: Analog Circuits and Signal Processing
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This book is a step-by-step tutorial on how to design a low-power,
high-resolution (not less than 12 bit), and high-speed (not less
than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to
respond to the challenge from the rapid growth of IoT. The
discussion includes design techniques on both the system level and
the circuit block level. In the architecture level, the
power-efficient pipelined AD converter, the hybrid AD converter and
the time-interleaved AD converter are described. In the circuit
block level, the reference voltage buffer, the opamp, the
comparator, and the calibration are presented. Readers designing
low-power and high-performance AD converters won't want to miss
this invaluable reference. Provides an in-depth introduction to the
newest design techniques for the power-efficient, high-resolution
(not less than 12 bit), and high-speed (not less than 200 MSps) AD
converter; Presents three types of power-efficient architectures of
the high-resolution and high-speed AD converter; Discusses the
relevant circuit blocks (i.e., the reference voltage buffer, the
opamp, and the comparator) in two aspects, relaxing the
requirements and improving the performance.
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