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Pro Node.js for Developers (Paperback, 1st ed.): Colin J. Ihrig Pro Node.js for Developers (Paperback, 1st ed.)
Colin J. Ihrig
R1,845 Discovery Miles 18 450 Ships in 10 - 15 working days

Since it's creation in 2009, Node.js has grown into a powerful and increasingly popular asynchronous-development framework for creating highly-scalable network applications using JavaScript. Respected companies such as Dow Jones and LinkedIn are among the many organizations to have seen Node's potential and adopted it into their businesses.Pro Node.js for Developers provides a comprehensive guide to this exciting new technology. We introduce you to Node - what it is, why it matters and how to set it up - before diving deeply into the key concepts and APIs that underpin its operation. Building upon your existing JavaScript skills you'll be shown how to use Node.js to build both Web- and Network-based applications, to deal with data sources, capture events and deal with child processes to create robust applications that will work well in a wide range of circumstances. Once you've mastered these skills we'll go further, teaching you more advanced software engineering skills that will give your code a professional edge. You'll learn how to create easily reusable modules that will save you time through code reuse, to log and debug your applications quickly and effectively and to write code that will scale easily and reliably as the demand for your application grows.

Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of... Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow (Paperback)
Colin J. Ihrig, Alex K. Jones
R1,217 Discovery Miles 12 170 Ships in 10 - 15 working days

Modern electronic design automation tools can be used to apply a variety of transformations to hardware blocks in an effort to achieve performance and power savings. A number of such transformations require tools with intimate knowledge of the design's timing characteristics. Static timing analysis estimates the worst-case timing behavior of hardware data flow graphs. The static timing analyzer described in this book operates on data flow graphs which are generated as intermediate representations within a C to VHDL hardware acceleration compiler. Two additional tools were then developed which utilize the results of the static timing analysis. An automated pipelining tool was developed to increase the throughput of large blocks of combinational logic generated by the compiler. Another tool was designed to mitigate power consumption resulting from combinational glitching. By inserting special signal buffers with preselected propagation delays, known as delay elements, functional units can be kept inactive until their inputs stabilize. This book explores these tools as well as the various design tradeoffs resulting from their use.

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