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Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Hardcover, 2014): Angeliki Kritikakou, Francky... Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Hardcover, 2014)
Angeliki Kritikakou, Francky Catthoor, Costas Goutis
R3,854 R3,414 Discovery Miles 34 140 Save R440 (11%) Ships in 12 - 17 working days

This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.

Designing CMOS Circuits for Low Power (Hardcover, 2002 ed.): Dimitrios Soudris, Christian Piguet, Costas Goutis Designing CMOS Circuits for Low Power (Hardcover, 2002 ed.)
Dimitrios Soudris, Christian Piguet, Costas Goutis
R6,327 Discovery Miles 63 270 Ships in 10 - 15 working days

This book is the fourth in a series on novel low power design architectures, methods and design practices. It results from of a large European project started in 1997, whose goal is to promote the further development and the faster and wider industrial use of advanced design methods for reducing the power con sumption of electronic systems. Low power design became crucial with the wide spread of portable infor mation and communication terminals, where a small battery has to last for a long period. High performance electronics, in addition, suffers from a per manent increase of the dissipated power per square millimeter of silicon, due to the increasing clock-rates, which causes cooling and reliability problems or otherwise limits the performance. The European Union's Information Technologies Programme 'Esprit' did therefore launch a 'Pilot action for Low Power Design', which eventually grew to 19 R&D projects and one coordination project, with an overall budget of 14 million EURO. It is meanwhile known as European Low Power Initiative for Electronic System Design (ESD-LPD) and will be completed in the year 2002. It involves to develop or demonstrate new design methods for power reduction, while the coordination project takes care that the methods, experiences and results are properly documented and publicised."

Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Paperback, Softcover reprint of the original 1st ed.... Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Paperback, Softcover reprint of the original 1st ed. 2014)
Angeliki Kritikakou, Francky Catthoor, Costas Goutis
R3,586 Discovery Miles 35 860 Ships in 10 - 15 working days

This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.

Designing CMOS Circuits for Low Power (Paperback, Softcover reprint of hardcover 1st ed. 2002): Dimitrios Soudris, Christian... Designing CMOS Circuits for Low Power (Paperback, Softcover reprint of hardcover 1st ed. 2002)
Dimitrios Soudris, Christian Piguet, Costas Goutis
R6,156 Discovery Miles 61 560 Ships in 10 - 15 working days

This book is the fourth in a series on novel low power design architectures, methods and design practices. It results from of a large European project started in 1997, whose goal is to promote the further development and the faster and wider industrial use of advanced design methods for reducing the power con sumption of electronic systems. Low power design became crucial with the wide spread of portable infor mation and communication terminals, where a small battery has to last for a long period. High performance electronics, in addition, suffers from a per manent increase of the dissipated power per square millimeter of silicon, due to the increasing clock-rates, which causes cooling and reliability problems or otherwise limits the performance. The European Union's Information Technologies Programme 'Esprit' did therefore launch a 'Pilot action for Low Power Design', which eventually grew to 19 R&D projects and one coordination project, with an overall budget of 14 million EURO. It is meanwhile known as European Low Power Initiative for Electronic System Design (ESD-LPD) and will be completed in the year 2002. It involves to develop or demonstrate new design methods for power reduction, while the coordination project takes care that the methods, experiences and results are properly documented and publicised."

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