Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.

This book provides a comprehensive overview of the state-of-the-art, data flow-based techniques for the analysis, modeling and mapping technologies of concurrent applications on multi-processors. The authors present a flow for designing embedded hard/firm real-time multiprocessor streaming applications, based on data flow formalisms, with a particular focus on wireless modem applications. Architectures are described for the design tools and run-time scheduling and resource management of such a platform.
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Dieses Buch beschreibt eine neue, grobkörnige rekonfigurierbare Architektur (CGRA), genannt Blocks, und stellt sie in den Kontext von Computerarchitekturen und insbesondere von anderen CGRAs. Das Buch beginnt mit einer ausführlichen Bewertung historischer und bestehender CGRAs und deren Stärken und Schwächen. Dies führt auch zu einem besseren Verständnis und einer neuen Definition dessen, was CGRAs von anderen Architekturansätzen unterscheidet. Die Autoren stellen Blocks als einzigartig vor, da es über separate programmierbare Steuer- und Datenpfade verfügt, so dass leichtgewichtige Befehlsdekodiereinheiten über eine statisch konfigurierte Verbindung beliebig mit einer oder mehreren Funktionseinheiten (FUs) verbunden werden können. In der Diskussion wird erläutert, wie Architekturen modelliert werden können, was zu einem Flächen- und Energiemodell für Blöcke führt. Die Genauigkeit dieses Modells wird anhand vollständig implementierter Architekturen bewertet, wobei sich zeigt, dass die Fehlerspanne sehr akzeptabel ist, obwohl es um drei Größenordnungen schneller ist als die Synthese. Das Buch schließt mit einer Fallstudie zu einem echten System-on-Chip, einschließlich einer RISC-Architektur, der Blocks CGRA und Peripheriegeräten.

This book provides a comprehensive overview of the state-of-the-art, data flow-based techniques for the analysis, modeling and mapping technologies of concurrent applications on multi-processors.  The authors present a flow for designing embedded hard/firm real-time multiprocessor streaming applications, based on data flow formalisms, with a particular focus on wireless modem applications. Architectures are described for the design tools and run-time scheduling and resource management of such a platform.  

Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.

This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs. The book starts with an extensive evaluation of historic and existing CGRAs and their strengths and weaknesses. This also leads to a better understanding and new definition of what distinguishes CGRAs from other architectural approaches. The authors introduce Blocks as unique due to its separate programmable control and data paths, allowing light-weight instruction decode units to be arbitrarily connected to one or more functional units (FUs) over a statically configured interconnect. The discussion includes an explanation of how to model architectures, resulting in an area and energy model for Blocks. The accuracy of this model is evaluated against fully implemented architectures, showing that although it is three orders of magnitude faster than synthesis the error margin is very acceptable. The book concludes with a case study on a real System-on-Chip, including a RISC architecture, the Blocks CGRA and peripherals.