This book covers two main topics: First, novel fast and flexible simulation techniques for modern heterogeneous NoC-based multi-core architectures. These are implemented in the full-system simulator called InvadeSIM and designed to study the dynamic behavior of hundreds of parallel application programs running on such architectures while competing for resources. Second, a novel actor-oriented programming library called ActorX10, which allows to formally model parallel streaming applications by actor graphs and to analyze predictable execution behavior as part of so-called hybrid mapping approaches, which are used to guarantee real-time requirements of such applications at design time independent from dynamic workloads by a combination of static analysis and dynamic embedding.

This book provides an overview of and essential insights on invasive computing. Pursuing a comprehensive approach, it addresses proper concepts, invasive language constructs, and the principles of invasive hardware. The main focus is on the important topic of how to map task-parallel applications to future multi-core architectures including 1,000 or more processor units. A special focus today is the question of how applications can be mapped onto such architectures while not only taking into account functional correctness, but also non-functional execution properties such as execution times and security properties. The book provides extensive experimental evaluations, investigating the benefits of applying invasive computing and hybrid application mapping to give guarantees on non-functional properties such as timing, energy, and security. The techniques in this book are presented in a step-by-step manner, supported by examples and figures. All proposed ideas for providing guarantees on performance, energy consumption, and security are enabled by using the concept of invasive computing and the exclusive usage of resources.

This book presents a new set of embedded system design techniques called multidimensional data flow, which combine the various benefits offered by existing methodologies such as block-based system design, high-level simulation, system analysis and polyhedral optimization. It describes a novel architecture for efficient and flexible high-speed communication in hardware that can be used both in manual and automatic system design and that offers various design alternatives, balancing achievable throughput with required hardware size. This book demonstrates multidimensional data flow by showing its potential for modeling, analysis, and synthesis of complex image processing applications. These applications are presented in terms of their fundamental properties and resulting design constraints. Coverage includes a discussion of how far the latter can be met better by multidimensional data flow than alternative approaches. Based on these results, the book explains the principles of fine-grained system level analysis and high-speed communication synthesis. Additionally, an extensive review of related techniques is given in order to show their relation to multidimensional data flow.

This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just-in-time compilation. The new, on-demand fault-tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

This book presents a new set of embedded system design techniques called multidimensional data flow, which combine the various benefits offered by existing methodologies such as block-based system design, high-level simulation, system analysis and polyhedral optimization. It describes a novel architecture for efficient and flexible high-speed communication in hardware that can be used both in manual and automatic system design and that offers various design alternatives, balancing achievable throughput with required hardware size. This book demonstrates multidimensional data flow by showing its potential for modeling, analysis, and synthesis of complex image processing applications. These applications are presented in terms of their fundamental properties and resulting design constraints. Coverage includes a discussion of how far the latter can be met better by multidimensional data flow than alternative approaches. Based on these results, the book explains the principles of fine-grained system level analysis and high-speed communication synthesis. Additionally, an extensive review of related techniques is given in order to show their relation to multidimensional data flow.

This book covers two main topics: First, novel fast and flexible simulation techniques for modern heterogeneous NoC-based multi-core architectures. These are implemented in the full-system simulator called InvadeSIM and designed to study the dynamic behavior of hundreds of parallel application programs running on such architectures while competing for resources. Second, a novel actor-oriented programming library called ActorX10, which allows to formally model parallel streaming applications by actor graphs and to analyze predictable execution behavior as part of so-called hybrid mapping approaches, which are used to guarantee real-time requirements of such applications at design time independent from dynamic workloads by a combination of static analysis and dynamic embedding.

This book provides an overview of and essential insights on invasive computing. Pursuing a comprehensive approach, it addresses proper concepts, invasive language constructs, and the principles of invasive hardware. The main focus is on the important topic of how to map task-parallel applications to future multi-core architectures including 1,000 or more processor units. A special focus today is the question of how applications can be mapped onto such architectures while not only taking into account functional correctness, but also non-functional execution properties such as execution times and security properties. The book provides extensive experimental evaluations, investigating the benefits of applying invasive computing and hybrid application mapping to give guarantees on non-functional properties such as timing, energy, and security. The techniques in this book are presented in a step-by-step manner, supported by examples and figures. All proposed ideas for providing guarantees on performance, energy consumption, and security are enabled by using the concept of invasive computing and the exclusive usage of resources.

This book constitutes the proceedings of the 29th International Conference on Architecture of Computing Systems, ARCS 2016, held in Nuremberg, Germany, in April 2016. The 29 full papers presented in this volume were carefully reviewed and selected from 87 submissions. They were organized in topical sections named: configurable and in-memory accelerators; network-on-chip and secure computing architectures; cache architectures and protocols; mapping of applications on heterogeneous architectures and real-time tasks on multiprocessors; all about time: timing, tracing, and performance modeling; approximate and energy-efficient computing; allocation: from memories to FPGA hardware modules; organic computing systems; and reliability aspects in NoCs, caches, and GPUs.

Eingebettete Systeme sind aus unserem taglichen Leben nicht mehr wegzudenken. Aufgrund ihrer Spezialisiertheit werden diese zunehmend aus interagierenden Hardware- und Software-Komponenten realisiert. Dies macht ein ganzheitliches, uber Hardware- und Softwaregrenzen hinausgehendes Verstandnis der Verifikationsproblematik erforderlich. Das vorliegende Lehrbuch dient als Einfuhrung in die systematische Verifikation eingebetteter Systeme, sowohl bei spezialisierten Verfahren zur Hardware- und Software-Verifikation als auch bei der Verifikation der Schnittstellen. Alle Verfahren werden in einer einheitlichen Notation fur Hard- und Software beschrieben.

Eine Einfuhrung in Verfahren zum systematischen Entwurf eingebetteter Systeme: Diese sind in einen technischen Kontext eingebettet und zugleich aus Optimalitatsgrunden hinsichtlich ihrer Aufgaben, Fahigkeiten, Schnittstellen und Einsatzgebiete spezialisiert. Daher mussen Hardware- und Softwarekomponenten miteinander kooperieren. Wichtige Einsatzgebiete sind die Automobil- und Unterhaltungselektronik sowie die Kommunikations- und Medizintechnik. Die Autoren beschreiben alle Verfahren in einer einheitlichen Notation fur Hard- und Software, wobei die wesentlichen Inhalte von der Modellierung bis hin zur Codegenerierung reichen. Aufgrund der steigenden Bedeutung eingebetteter Systeme stellt dieses Buch unentbehrliches Wissen zu Verfugung.