This book constitutes the refereed joint post-conference proceedings of the 6th International Symposium on High-Performance Computing, ISHPC 2005, held in, Japan, in 2005. It also includes the refereed post-proceedings of the First International Workshop on Advanced Low Power Systems 2006, ALPS2006, and some from the Workshop on Applications for PetaFLOPS Computing, APC 2005. A total of 42 papers were carefully selected from 76 submissions, covering a huge range of topics.

The 5th International Symposium on High Performance Computing (ISHPC-V) was held in Odaiba, Tokyo, Japan, October 20-22, 2003. The symposium was thoughtfully planned, organized, and supported by the ISHPC Organizing C- mittee and its collaborating organizations. The ISHPC-V program included two keynote speeches, several invited talks, two panel discussions, and technical sessions covering theoretical and applied research topics in high-performance computing and representing both academia and industry. One of the regular sessions highlighted the research results of the ITBL project (IT-based research laboratory, http://www.itbl.riken.go.jp/). ITBL is a Japanese national project started in 2001 with the objective of re- izing a virtual joint research environment using information technology. ITBL aims to connect 100 supercomputers located in main Japanese scienti?c research laboratories via high-speed networks. A total of 58 technical contributions from 11 countries were submitted to ISHPC-V. Each paper received at least three peer reviews. After a thorough evaluation process, the program committee selected 14 regular (12-page) papers for presentation at the symposium. In addition, several other papers with fav- able reviews were recommended for a poster session presentation. They are also included in the proceedings as short (8-page) papers. Theprogramcommitteegaveadistinguishedpaperawardandabeststudent paper award to two of the regular papers. The distinguished paper award was given for "Code and Data Transformations for Improving Shared Cache P- formance on SMT Processors" by Dimitrios S. Nikolopoulos. The best student paper award was given for "Improving Memory Latency Aware Fetch Policies for SMT Processors" by Francisco J. Cazorla.

This book constitutes the refereed proceedings of the 4th International Symposium on High Performance Computing, ISHPC 2002, held in Kansai Science City, Japan, in May 2002 together with the two workshops WOMPEI 2002 and HPF/HiWEP 2002.The 51 revised papers presented were carefully reviewed and selected for inclusion in the proceedings. The book is organized in topical sections on networks, architectures, HPC systems, Earth Simulator, OpenMP-WOMPEI 2002, and HPF-HiWEP 2002.

I wish to welcome all of you to the International Symposium on High Perf- mance Computing 2000 (ISHPC 2000) in the megalopolis of Tokyo. After having two great successes with ISHPC'97 (Fukuoka, November 1997) and ISHPC'99 (Kyoto, May 1999), many people have requested that the symposium would be held in the capital of Japan and we have agreed. I am very pleased to serve as Conference Chair at a time when high p- formance computing (HPC) has a signi?cant in?uence on computer science and technology. In particular, HPC has had and will continue to have a signi?cant - pact on the advanced technologies of the "IT" revolution. The many conferences and symposiums that are held on the subject around the world are an indication of the importance of this area and the interest of the research community. One of the goals of this symposium is to provide a forum for the discussion of all aspects of HPC (from system architecture to real applications) in a more informal and personal fashion. Today we are delighted to have this symposium, which includes excellent invited talks, tutorials and workshops, as well as high quality technical papers.

This book constitutes the refereed proceedings of the Second International Symposium on High-Performance Computing, ISHPC'99, held in Kyoto, Japan in May 1999.
The 23 revised full papers presented were carefully selected from a total of 61 submissions. Also included are the abstracts of several invited talks and 12 reviewed short papers corresponding to the poster presentations given at the symposium. The papers address many current issues in high-performance computing and communication, regarding hardware and network architectures as well as regarding software and theoretical foundations; also advanced applications are studied in a variety of fields including modeling, visualisation, and computational science.

This book constitutes the refereed proceedings of the International Symposium on High Performance Computing, ISHPC '97, held in Fukuoka, Japan in November 1997.
The volume presents four distinguished papers and 16 revised regular papers selected from more than 40 submissions on the basis of at least three peer reviews. Also included are seven invited contributions by leading authorities and 10 selected poster presentations. The papers are organized in topical chapters on high performance systems architectures, networks, compilers, systems software, and applications in various areas.