Wide-bandwidth high dynamic range Digital to Analog Converters (D/A) are essential elements of modern systems, e.g. multi-carrier communication systems. Current Steering D/A converters offer the potential to achieve high dynamic range for wide frequency bandwidths, however, their performance at higher frequencies is usually limited by strong nonlinear behavior. This behavior is not well understood and impedes performance progress.

Wide-Bandwidth High Dynamic Range D/A Converters presents a structured description of the operation principles and the nonlinear behavior of Current Steering D/A Converters, and shows ways to deal with it in the design phase.

The book provides the reader a thorough understanding of error mechanisms at high frequencies. It explains their effects and shows their dependencies with parameters of the processed signal, the architecture, its circuit blocks and their implementations. A highlight of the book is the detailed treatment of timing errors caused by circuit imperfections due to process mismatch and clock interconnects.

The book follows a unique approach, building an analysis and synthesis framework of concepts with a generic scope beyond the current steering architecture.

The concepts are tested in practice with the design and measurements of a high performance 12b 500MSample/sec Current Steering Digital to Analog Converter realized in 0.18m m CMOS.

Wide-bandwidth high dynamic range Digital to Analog Converters (D/A) are essential elements of modern systems, e.g. multi-carrier communication systems. Current Steering D/A converters offer the potential to achieve high dynamic range for wide frequency bandwidths, however, their performance at higher frequencies is usually limited by strong nonlinear behavior. This behavior is not well understood and impedes performance progress.

Wide-Bandwidth High Dynamic Range D/A Converters presents a structured description of the operation principles and the nonlinear behavior of Current Steering D/A Converters, and shows ways to deal with it in the design phase.

The book provides the reader a thorough understanding of error mechanisms at high frequencies. It explains their effects and shows their dependencies with parameters of the processed signal, the architecture, its circuit blocks and their implementations. A highlight of the book is the detailed treatment of timing errors caused by circuit imperfections due to process mismatch and clock interconnects.

The book follows a unique approach, building an analysis and synthesis framework of concepts with a generic scope beyond the current steering architecture.

The concepts are tested in practice with the design and measurements of a high performance 12b 500MSample/sec Current Steering Digital to Analog Converter realized in 0.18m m CMOS.