Few people know what wandering spurs are; fewer still know how to get rid of them. This book, which is written by those who raised awareness of wandering spurs, explained how they arise, and invented ways to get rid of them, contains valuable insights, analytical techniques and examples that will enable the reader to become an expert in the area. The book is aimed at circuit design professionals who need to ensure that their designs are not compromised by wandering spurs. In addition to insights, theory, and analysis, it contains practical circuit solutions, the performance of which are characterized experimentally. This book explains-using simulation, analysis, and experimental measurements-what wandering spurs are, how they arise, how to characterize them and, most importantly, how to get rid of them. The authors present not only theoretical analysis and simulation strategies, but also provide an overview of spectral analysis techniques for studying the phenomenon and convincing experimental results from both commercially available and custom-designed monolithic synthesizers. Explains what wandering spurs are and how they differ qualitatively from the well-known fixed spurs that plague fractional-N frequency synthesizers; Provides analytical and simulation methods to study wandering spurs and original analysis of the cause of this recently reported spectral phenomenon; Presents and analyses theoretical designs based on a conventional MASH 1-1-1 to mitigate wandering spurs; Describes measured performance for the discussed designs, confirming their effectiveness in mitigating wandering spurs.

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

This book describes several Digital Delta-Sigma Modulator (DDSM) architectures, including multi stage noise shaping (MASH), error feedback modulator (EFM) and single quantizer (SQ)-DDSM modulators, with a focus on predicting and maximizing their cycle lengths. The authors aim to demystify an important aspect of these particular DDSM structures, namely the existence of spurs resulting from the inherent periodicity of DDSMs with constant inputs. Simulink and MATLAB models and code are presented in Chapters 2-5 to enable the reader to reproduce the results in this work and to explore further. These examples will also be helpful for first-time designers of DDSMs.

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.