This book is based on the 18 presentations during the 21st workshop on Advances in Analog Circuit Design. Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development. "

This book gives a detailed analysis of switched-capacitor DC-DC converters that are entirely integrated on a single chip and establishes that these converters are mainly limited by the large parasitic coupling, the low capacitor energy density, and the fact that switched-capacitor converter topologies only have a fixed voltage conversion ratio. The authors introduce the concept of Advanced Multiphasing as a way to circumvent these limitations by having multiple out-of-phase parallel converter cores interact with each other to minimize capacitor charging losses, leading to several techniques that demonstrate record efficiency and power-density, and even a fundamentally new type of switched-capacitor topology that has a continuously-scalable conversion ratio. Provides single-source reference to the recently-developed Advanced Multiphasing concept; Enables greatly improved performance and capabilities in fully integrated switched-capacitor converters; Enables readers to design DC-DC converters, where multiple converter cores are put in parallel and actively interact with each other over several phases to improve their capabilities.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors' systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes. "

Analog Circuit Design contains the contribution of 18 tutorials of the 18th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 18 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Smart Data Converters: Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology, Filters on Chip: Chaired by Herman Casier, AMI Semiconductor Fellow, Multimode Transmitters: Chaired by Prof. M. Steyaert, Catholic University Leuven, Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.

This book fits in the quest for highly efficient fully integrated xDSL modems for central office applications. It presents a summary of research at one of Europe 's most famous analog design research groups over a five year period. The book focuses on the line driver, the most demanding building block of the xDSL modem for lowering power.

The book covers the total design flow of monolithic CMOS high voltage circuits. It is essential reading for analog design engineers.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers.

The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.

Analog Circuit Design contains eighteen tutorials, reflecting the contributions of six experts, as presented at the 15th workshop on Advances in Analog Circuit Design (AACD). Provides 18 overviews of analog circuit design in High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless. An essential reference source for the latest developments in the field, tutorial coverage makes it suitable for advanced design courses.

Analog Circuit Design contains the contribution of 18 experts from the 13th International Workshop on Advances in Analog Circuit Design. It is number 13 in the successful series of Analog Circuit Design.

It provides 18 excellent overviews of analog circuit design in: Sensor and Actuator Interfaces, Integrated High-Voltage Electronics and Power Management, and Low-Power and High-Resolution ADC s.

Analog Circuit Design is an essential reference source for analog circuits designers and researchers wishing to keep abreast with the latest developments in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

CMOS Fractional-N Synthesizers fits in the quest for small and cheap cellular transceiver solutions. The book is conceived as a manual for the design of fully integrated DeltaSigma fractional-N frequency synthesizers in CMOS with a focus on achieving a high spectral purity, i.e. low-phase-noise and high spurious suppression. Fractional-N design is elaborated from specification derivation up to architectural and building block level and down to circuit level.

CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case.

The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques.

On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers.

CMOS Fractional-N Synthesizers covers thetotal design flow of monolithic CMOS fractional-N synthesizers with high spectral purity while providing insight in the most critical issues of monolithic fractional-N synthesis. All material is experimentally verified with several CMOS implementations, with ultimately a monolithic CMOS &Dgr;&Sgr;-controlled fractional-N synthesizer, which was part of a CMOS DCS-1800 transceiver front-end. The book is essential reading for analog and RF design engineers and researchers in the field and it is also suitable as text book for an advanced course on the subject.

This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective. * Discusses important aspects of radiation-tolerant analog IC design, including realistic applications and radiation effects on ICs; * Demonstrates radiation-hardened-by-design techniques through a design-test-radiation assessment practice; * Describes a new type of Time-to-Digital (TDC) converter designed for radiation-tolerant application; * Explains the design and measurement of all functional blocks (e.g., bandgap reference, relaxation oscillator) in the TDC.

Design of Multi-Bit Delta-Sigma A/D Converters discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies. Design of Multi-Bit Delta-Sigma A/D Converters starts with a general introduction of the concepts of Delta-Sigma converters. A wide variety of architectures are discussed, ranging from single-loop to cascaded and various multi-bit topologies. These topologies are optimized to obtain stable converters with a high accuracy. A clear overview is provided of the maximum achievable performance of each topology, which allows a designer to select the optimal architecture for a certain specification. Special attention is paid to multi-bit architectures and possible solutions for the linearity problem of the DA converter in the feedback loop of converters. Several circuit design aspects of multi-bit Delta-Sigma converters are discussed. Various models are provided for a wide range of linear and non-linear circuit imperfections, which can degrade the performance of the converter. These models allow the designer to determine the required specifications for the different building blocks and form the basis of a systematic design procedure. The presented material is combined in a concluding chapter, which illustrates the systematic design procedure for two high-performance converters. Design of Multi-Bit Delta-Sigma A/D Converters provides a clear comparison of architectures and yields insight into the influence of the most important circuit non-idealities. It will allow you to design robust and high-performance Delta-Sigma AD converters in a shorter time. It is essential reading for analog design engineers and researchers in the field of AD converters and it is also suitable as a text for an advanced course on the subject.

Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design.

Today's booming expanse of personal wireless radio communications is a rich source of new challenges for the designer of the underlying enabling te- nologies. Personal communication networks are designed from a fundam- tally different perspective than broadcast service networks, such as radio and television. While the focus of the latter is on reliability and user comfort, the emphasis of personal communication devices is on throughput and mobility. However, because the wireless channel is a shared transmission medium with only very limited resources, a trade-off has to be made between mobility and the number of simultaneous users in a con?ned geographical area. Accord- 1 ing to Shannon's theorem on channel capacity, the overall data throughput of a communication channel bene?ts from either a linear increase of the tra- mission bandwidth, or an (equivalent) exponential increase in signal quality. Consequently, it is more bene?cial to think in terms of channel bandwidth than it is to pursue a high transmission power. All the above elements are embodied in the concept of spatial ef?ciency. By describing the throughput of a system 2 in terms of bits/s/Hz/m , spatial ef?ciency takes into account that the use of a low transmission power reduces the operational range of a radio transmission, and as such enables a higher reuse rate of the same frequency spectrum.

Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters.
Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.

Analog Circuit Design contains the contribution of 18 tutorials of the 17th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 17 in this successful series of Analog Circuit Design.

CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very basics.

The revolution in wireless communications sets new requirements for transceivers (transmitter-receivers). Higher operating frequencies, lower power consumption and very high degree of integration, are new specifications which require design approaches quite different from classical RF design techniques. The integratability and power consumption reduction of the digital component will further improve with the continued downscaling of technologies. This is, however, completely different for the analog transceiver front-end, the component which interfaces between the antenna and the digital signal processor. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology.

CMOS Wireless Transceiver Design is the first book to give a comprehensive treatment of the design of transceivers for use in wireless communication systems. The book overviews existing transceiver design and goes on to introduce new multi-path receiver and transmitter topologies. It also presents a formal methodology for the high-level design of transceiver architectures and fully illustrates its use in the design of a low-IF/direct upconversion GSM transceiver front-end.

CMOS Wireless Transceiver Design further demonstrates its practical nature by containing concluding chapters which study both the integration of RF building blocks in CMOS and the capabilities of deep submicron CMOS used in combination with the new transceiver topologies for the implementation of wireless transceiver front-ends in the 1 to 2 GHz range.

CMOS Wireless Transceiver Design is essential reading for allresearchers and practising engineers working in the design of wireless communication systems requiring highly integrated RF transceivers.

This practical guide and introduction to the design of key RF building blocks used in high data rate transmitters emphasizes CMOS circuit techniques applicable to oscillators and upconvertors. The book is written in an easily accessible manner, without losing detail on the technical side.

This book presents state-of-the-art techniques for radiation hardened high-resolution Time-to-Digital converters and low noise frequency synthesizers. Throughout the book, advanced degradation mechanisms and error sources are discussed and several ways to prevent such errors are presented. An overview of the prerequisite physics of nuclear interactions is given that has been compiled in an easy to understand chapter. The book is structured in a way that different hardening techniques and solutions are supported by theory and experimental data with their various tradeoffs. Based on leading-edge research, conducted in collaboration between KU Leuven and CERN, the European Center for Nuclear Research Describes in detail advanced techniques to harden circuits against ionizing radiation Provides a practical way to learn and understand radiation effects in time-based circuits Includes an introduction to the underlying physics, circuit design, and advanced techniques accompanied with experimental data

This volume addresses the low-power low-voltage Sigma-Delta ADC design in nanometer CMOS technologies at both the circuit-level and the system level. The low-power low-voltage Sigma-Delta modulator design at the circuit level is introduced. A design example is presented in this book. This design is the first published Sigma-Delta design in a 90-nm CMOS technology and reaches a very high figure-of-merit. At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.

Environmental electromagnetic pollution has drastically increased over the last decades. The omnipresence of communication systems, various electronic appliances and the use of ever increasing frequencies, all contribute to a noisy electromagnetic environment which acts detrimentally on sensitive electronic equipment. Integrated circuits must be able to operate satisfactorily while cohabiting harmoniously in the same appliance, and not generate intolerable levels of electromagnetic emission, while maintaining a sound immunity to potential electromagnetic disturbances: analog integrated circuits are in particular more easily disturbed than their digital counterparts, since they don't have the benefit of dealing with predefined levels ensuring an innate immunity to disturbances. The objective of the research domain presented in EMC of Analog Integrated Circuits is to improve the electromagnetic immunity of considered analog integrated circuits, so that they start to fail at relevantly higher conduction levels than before.

Analog Circuit Design contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of:
Topic 1: Low Voltage Low Power, chairman: Andrea Baschirotto
Topic 2: Short Range Wireless Front-Ends, chairman: Arthur van Roermund
Topic 3: Power Management and DC-DC, chairman: Michiel Steyaert.
Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

This book describes the design of optical receivers that use the most economical integration technology, while enabling performance that is typically only found in very expensive devices. To achieve this, all necessary functionality, from light detection to digital output, is integrated on a single piece of silicon. All building blocks are thoroughly discussed, including photodiodes, transimpedance amplifiers, equalizers and post amplifiers.

CMOS Cellular Receiver Front-Ends: from Specification to Realization deals with the design of the receive path of a highly-integrated CMOS cellular transceiver for the GSM-1800 cellular system. The complete design trajectory is covered, starting from the documents describing the standard down to the systematic development of CMOS receiver ICs that comply to the standard. The design of CMOS receivers is tackled at all abstraction levels: from architecture level, via circuit level, down to the device level, and the other way around.

The theoretical core of the book discusses the fundamental and more advanced aspects of RF CMOS design. It focuses specifically on all aspects of the design of high-performance CMOS low-noise amplifiers.

The recent boom in the mobile telecommunication market has captured the interest of electronic and communication companies worldwide. In order to cut costs, and to decrease volume and power consumption, research is ongoing which focuses on the integration of a complete RF transceiver on a single die. This book discusses for the first time an important building block in such a single-chip wireless transceiver, that is, the frequency synthesizer. CMOS Wireless Frequency Synthesizer Design starts off with a comprehensive overview of possible synthesizer architectures together with a discussion of the general PLL theory. It goes on to present an easy calculation method of predicting LC-tuned VCO phase noise. Practical designs are presented which illustrate in detail the implementation of monolithic LC-tuned VCOs, using either bonding-wire inductors or hollow planar inductors. It is demonstrated that such designs can achieve the required phase noise specifications using standard CMOS technology. CMOS Wireless Frequency Synthesizer Design also discusses the other PLL building blocks such as the high-speed frequency divider. The phase-switching multi-modulus prescaler architecture, which combines high input frequencies with a programmable division factor, is presented in chapter 6. A concluding chapter combines all the gathered knowledge and presents the first monolithic standard CMOS frequency synthesizer that achieves the DCS-1800 specifications. CMOS Wireless Frequency Synthesizer Design is essential reading for all researchers and practicing engineers working in the design of wireless communication systems requiring highly integrated RF transceivers and frequency synthesizers.