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Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation - 10th International Workshop, PATMOS 2000,... Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation - 10th International Workshop, PATMOS 2000, Goettingen, Germany, September 13-15, 2000 Proceedings (Paperback, 2000 ed.)
Dimitrios Soudris, Peter Pirsch, Erich Barke
R1,596 Discovery Miles 15 960 Ships in 10 - 15 working days

Thisworkshopisthetenthinaseriesofinternationalworkshops. Thisyear ittakesplaceinG..ottingen,Germany,andisorganizedbytheUniversityof Hannover. G..ottingenhasonethemostfamousGermanuniversities,whereverywell knownscientistslikeLichtenberg,Hilbert,GaussandvonNeumannstudied, workedandtaught. ItalsohostsseveralresearchinstitutesoftheMax-Planck- Society. The?rstelectronictubecalculatorG1wasbuiltinG..ottingenin1952 byH. Billing. Additionally,G..ottingenwasselectedbecauseitisadjacenttothe worldexpositionEXPO2000inHannoverwhichgivesanoutlookintothe21st centurycoveringthemajortopicsofhumankind,natureandtechnology. WithrespecttotheseinspiringsurroundingsthetechnicalprogramofPAT- MOS2000includes10sessionsdedicatedtomostimportantsubjectsofpower andtimingmodeling,optimizationandsimulationatthedawnofthe21stc- tury. ThefourinvitedtalksaddresstheEuropeanresearchactivitiesinthewo- shop?elds,theevolvingneedsforminimalpowerconsumptionintheareaof wirelessandchipcardapplicationsanddesignmethodologiesofveryhighly- tegratedmultimediaprocessors. Theworkshopisaresultofthejointworkofalargenumberofindividuals, whocannotallbementionedhere. Inparticular,wewouldliketoacknowledge theoutstandingworkofthereviewers,whodidacompetentjobinatimely manner. Wealsohavetothankthemembersofthelocalorganizingcommittee fortheire?ortinenablingtheconferencetorunsmoothly. Finally,wegratefully acknowledgethesupportofallorganizationsandinstitutionssponsoringthe conference. September2000 PeterPirsch ErichBarke DimitriosSoudris Organization OrganizationCommitee GeneralCoChairs: PeterPirsch(UniversityofHannover,Germany) ErichBarke(UniversityofHannover,Germany) ProgramChair: DimitriosSoudris (DemocritusUniversityofThrace,Greece) FinanceChair: LarsHedrich(UniversityofHannover,Germany) PublicationChair: AchimFreimann (UniversityofHannover,Germany) Audio-VisualChair: J..orgAbke(UniversityofHannover,Germany) LocalArrangementsChair: CarstenReuter(UniversityofHannover,Germany) ProgramCommitee D. Auvergne(UniversityofMontpellier,France) J. Bormans(IMEC,Belgium) J. Figueras(UniversityofCatalunya,Spain) C. E. Goutis(UniversityofPatras,Greece) A. Guyot(INPGGrenoble,France) R. Hartenstein(UniversityofKaiserslautern,Germany) S. Jones(UniversityofLoughborough,UnitedKingdom) P. Larsson-Edefors(UniversityofLink..oping,Sweden) E. Macii(PolytechnicofTorino,Italy) V. Moshnyaga(UniversityofFukuoka,Japan) W. Nebel(UniversityofOldenburg,Germany) J. A. Nossek(TechnicalUniversityofMunc .. hen,Germany) A. Nunez(UniversityofLasPalmas,Spain) M. Papaefthymiou(UniversityofMichigan,UnitedStates) M. Pedram(UniversityofSouthernCalifornia,UnitedStates) H. P?eiderer(UniversityofUlm,Germany) C. Piguet(CSEM,Switzerland) R. Reis(UniversityofPortoAlegre,Brazil) M. Robert(UniversityofMontpellier,France) A. Rubio(UniversityofCatalunya,Spain) J. Sparso(TechnicalUniversityofDenmark,Denmark) A. Stempkowsky(AcademyofSciences,Russia) T. Stouraitis(UniversityofPatras,Greece) J. F. M. Theeuwen(Philips,TheNetherlands) A. -M. Trullemans-Anckaert(UniversityofLouvain,Belgium) R. Zafalon(STMicroelectronics,Italy) VIII Organization SteeringCommitee D. Auvergne(UniversityofMontpellier,France) R. Hartenstein(UniversityofKaiserslautern,Germany) W. Nebel(UniversityofOldenburg,Germany) C. Piguet(CSEM,Switzerland) A. Rubio(UniversityofCatalunya,Spain) J. Sparso(TechnicalUniversityofDenmark,Denmark) A. -M. Trullemans-Anckaert(UniversityofLouvain,Belgium) SponsoringInstitutions EuropeanCommissionDirectorate-GeneralInformationSociety IEEECircuitsandSystemsSociety TableofContents Opening Constraints, Hurdles, and Opportunities for a Successful European Take-Up Action ...1 R. vanLeuken,R. Nouta,A. deGraf(DelftUniversityofTechnology, TheNetherlands) RTL Power Modeling Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques...3 M. Anton,M. Chinosi,D. Sirtori,R. Zafalon(STMicroelectronics, Italy) Power Models for Semi-autonomous RTL Macros ...14 A. Bogliolo(UniversityofFerrara,Italy) E. Macii,V. Mihailovici,M. Poncino(PolytechnicalUniversityofTorino, Italy) Power Macro-Modelling for Firm-Macro ...24 G. Jochens,L. Kruse,E. Schmidt,A. Stammermann,W. Nebel (OFFISResearchInstitute,Oldenburg,Germany) RTL Estimation of Steering Logic Power...36 C. Anton,P. Civera,I. Colonescu,E. Macii,M. Poncino (PolytechnicalUniversityofTorino,Italy) A. Bogliolo(UniversityofFerrara,Italy) PowerEstimationandOptimization Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers ...47 N. D. Zervas,S. Theoharis,A. P. Kakaroudas,G. Theodoridis, C. E. Goutis(UniversityofPatras,Greece) D.

Architekturen Der Digitalen Signalverarbeitung (German, Paperback, Softcover Reprint of the Original 1st 1996 ed.): Peter Pirsch Architekturen Der Digitalen Signalverarbeitung (German, Paperback, Softcover Reprint of the Original 1st 1996 ed.)
Peter Pirsch
R1,378 Discovery Miles 13 780 Ships in 10 - 15 working days

Mit den Fortschritten in der Mikroelektronik wachst auch der Bedarf an VLSI-Realisierungen von digitalen Signalverarbeitungseinheiten. Die zunehmende Komplexitat der Signalverarbeitungsverfahren fuhrt insbesondere bei Signalen mit hoher Quellenrate auf Anforderungen, die nur durch spezielle Schaltungsstrukturen erfullt werden konnen. Dieses Buch behandelt Schaltungstechniken und Architekturen zur Erzielung hoher Durchsatzraten von Algorithmen der Signalverarbeitung. Neben alternativen Schaltungstechniken zur Realisierung der Basisoperationen, Addition, Multiplikation und Division werden CORDIC-Architekturen zur Implementierung transzendenter Funktionen vorgestellt. Zur Konzeption von Systemen mit Parallelverarbeitung und Pipelining wird ein allgemeines Verfahren zur Abbildung von Signalverarbeitungsalgorithmen auf anwendungsspezifischen Architekturen erlautert. Hierzu werden beispielhaft spezielle Architekturen fur Filter, Matrixoperationen und die diskrete Fouriertransformation erortert. Architekturen programmierbarer digitaler Signalprozessoren sowie beispielhafte zugehorige Implementierungen sind eingeschlossen. Das Buch soll sowohl Studenten und Ingenieure der Elektrotechnik als auch der technischen Informatik mit Architekturkonzepten der digitalen Signalverarbeitung vertraut machen."

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